EMULATED CURRENT RAMP FOR DC-DC CONVERTER

• US 20140239924A1
• Filed: 02/22/2013
• Published: 08/28/2014
• Est. Priority Date: 02/22/2013
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Guo, Song
• Granted Patent: US 9,317,049 B2
• Time in Patent Office: Days
• US Class Current: 323/271
• CPC Class Codes: G05F 1/46 wherein the variable actually regulated by the final control device is dc G05F1/625 takes precedence
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A voltage converter (FIG. 4) for a power supply circuit is disclosed. The voltage converter comprises a control circuit (400) coupled to receive an enable (EN) signal. The control circuit produces a first control signal (PWM) to provide a load current (I_L) in response to the enable signal. A sample and hold circuit (408) is arranged to produce a third control signal (CSP) to emulate the load current and a fourth control signal (CSN′) to sample and hold value of the third control signal. A comparator circuit (416) is arranged to compare the third and fourth control signals and produce the enable signal in response to a result of the comparison.

Claims

1. A voltage converter, comprising:

a control circuit coupled to receive an enable signal, the control circuit producing a first control signal to provide a load current to an output terminal in response to the enable signal;

a sample and hold circuit arranged to produce a third control signal to emulate the load current and a fourth control signal to sample and hold a value of the third control signal; and

a comparator circuit arranged to compare the third and fourth control signals and produce the enable signal in response to a result of the comparison.

2. A voltage converter as in claim 1, comprising:

a load capacitor coupled to the output terminal; and

an inductor arranged to conduct the load current to the load capacitor in response to the first control signal.

3. A voltage converter as in claim 1, wherein the control circuit produces a second control signal that is complementary to the first control signal.

4. A voltage converter as in claim 1, wherein the control circuit produces a second control signal having a low level while the first control signal has a high level, and wherein the third and fourth control signals are equal when the first and second control signals both have a low level.

5. A voltage converter as in claim 1, wherein the value of the fourth control signal is a sample of a minimum value of the third control signal.

6. A voltage converter as in claim 1, wherein the third control signal alternately has minimum and maximum values, and wherein the fourth control signal is a successive sample of each minimum value of the third control signal.

7. A voltage converter as in claim 1, comprising:

a current source;

a capacitor coupled to receive a current from the current source; and

a comparator having a first input terminal coupled to the capacitor and having a second input terminal coupled to the output terminal, wherein a duration of the first control signal is determined by an output signal from the comparator.

8. A power supply, comprising:

a first output transistor having a first control terminal and having a current path coupled between a supply voltage and an output terminal;

a second output transistor having a second control terminal and having a current path coupled between the output terminal and a reference terminal;

a control circuit coupled to receive an enable signal, the control circuit producing a first control signal at the first control terminal in response to the enable signal, and producing a second control signal at the second control terminal;

a sample and hold circuit arranged to produce a third control signal to emulate the load current and a fourth control signal to sample and hold a value of the third control signal; and

a comparator circuit arranged to compare the third and fourth control signals and produce the enable signal in response to a result of the comparison.

9. A power supply as in claim 8, comprising:

a load capacitor coupled to the output terminal; and

an inductor arranged to conduct the load current to the load capacitor in response to the first control signal.

10. A power supply as in claim 8, wherein the first and second control signals are complementary in a continuous mode of operation.

11. A power supply as in claim 8, wherein the first and second control signals are both low at a first time in a discontinuous mode of operation.

12. A power supply as in claim 8, wherein the value of the fourth control signal is a sample of a minimum value of the third control signal.

13. A power supply as in claim 8, wherein the value of the fourth control signal is a sample of a maximum value of the third control signal.

14. A power supply as in claim 8, wherein the third control signal alternately has minimum and maximum values, and wherein the fourth control signal is a successive sample of each minimum or maximum value of the third control signal.

15. A method of regulating an output voltage, comprising:

producing an on-time signal having a first duration in response to an enable signal;

producing a load current in response to the on-time signal;

producing a first voltage signal emulating the load current;

producing a second voltage signal having a sampled value of the first voltage signal;

comparing the first and second voltage signals; and

producing the enable signal in response to a result of the step of comparing.

16. A method as in claim 15, comprising:

producing an off-time signal having a second duration after the step of producing the on-time signal.

17. A method as in claim 15, wherein the sampled value is a minimum value of the first voltage signal.

18. A method as in claim 15, wherein the first voltage signal comprises a sequence of alternating minimum and maximum values, and wherein the second voltage signal is a sample of each successive minimum value of the first voltage signal.

19. A method as in claim 15, wherein the first voltage signal comprises a sequence of alternating minimum and maximum values, and wherein the second voltage signal is a sample of each successive maximum value of the first voltage signal.

20. A method as in claim 15, wherein the step of comparing comprises comparing a feedback signal from the output voltage to a reference voltage.