SEMICONDUCTOR DEVICE

• US 20140247070A1
• Filed: 04/11/2014
• Published: 09/04/2014
• Est. Priority Date: 05/13/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Umezaki, Atsushi
• Granted Patent: US 9,106,224 B2
• Time in Patent Office: Days
• US Class Current: 327/109
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/167 by electrophoresis
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G11C 19/184 with field-effect transistors, e.g. MOS-FET
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/7869 : having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H03K 17/06 : Modifications for ensuring a fully conducting state
• CPC Class Codes: H03K 17/08104 : in field-effect transistor switches H03K17/0812, H03K17/0814 take precedence
• CPC Class Codes: H03K 19/018521 : of complementary type, e.g. CMOS
• CPC Class Codes: H03K 3/356 : Bistable circuits
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays

Abstract

Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.

Claims

1. (canceled)

2. A driving method of a semiconductor device which comprises:

a first circuit comprising a capacitor and a first transistor; and

a second circuit comprising a second transistor,

wherein a gate of the second transistor is connected to the first circuit,

wherein the first transistor has a same conductivity type as the second transistor, the driving method comprising the steps of;

supplying a first potential to a first electrode of the capacitor;

supplying a second potential to a second electrode of the capacitor through the first transistor, wherein the second potential is lower than the first potential; and

making the second electrode of the capacitor into a floating state.

3. The driving method according to claim 2,

wherein an offset voltage is held in the capacitor, and

wherein a signal in accordance with the offset voltage is input to the gate of the second transistor.

4. The driving method according to claim 2, wherein at least one of the first transistor and the second transistor comprises an oxide semiconductor.

5. The driving method according to claim 2, wherein the second circuit further comprises a third transistor, a fourth transistor, and a fifth transistor each having the same conductivity type as the second transistor.

6. The driving method according to claim 2, wherein the second potential is lower than a potential supplied to a first terminal of the second transistor.

7. A driving method of a semiconductor device which comprises:

a capacitor;

a first transistor; and

a second transistor,

wherein a first electrode of the capacitor is connected to a first wiring,

wherein a first terminal of the first transistor is connected to a second wiring,

wherein a second electrode of the capacitor, a second terminal of the first transistor, and the gate of the second transistor are connected to each other,

wherein the first transistor has a same conductivity type as the second transistor,

the driving method comprising the steps of;

supplying a first potential to the first electrode of the capacitor;

turning on the first transistor so that a second potential is supplied to the second electrode of the capacitor through the first transistor; and

turning off the first transistor so that the second electrode of the capacitor is made into a floating state.

8. The driving method according to claim 7,

wherein an offset voltage is held in the capacitor, and

wherein a signal in accordance with the offset voltage is input to the gate of the second transistor.

9. The driving method according to claim 7, wherein at least one of the first transistor and the second transistor comprises an oxide semiconductor.

10. The driving method according to claim 7, wherein the semiconductor device further comprises a third transistor, a fourth transistor, and a fifth transistor each having the same conductivity type as the second transistor.

11. The driving method according to claim 7, wherein the second potential is lower than a potential supplied to a first terminal of the second transistor.

12. A driving method of a semiconductor device which comprises:

capacitor;

a first transistor; and

a second transistor,

wherein a first electrode of the capacitor is connected to a first wiring,

wherein a first terminal of the first transistor is connected to a second wiring,

wherein a second electrode of the capacitor, a second terminal of the first transistor, and the gate of the second transistor are connected to each other,

wherein the first transistor has a same conductivity type as the second transistor,

the driving method comprising the steps of;

in a period during which an offset voltage is held in the capacitor,

supplying a first potential to the first electrode of the capacitor; and

turning on the first transistor so that a second potential is supplied to the second electrode of the capacitor through the first transistor,

in a period during which a signal in accordance with the offset voltage is output from the capacitor,

turning off the first transistor so that the second electrode of the capacitor is made into a floating state; and

outputting the signal in accordance with the offset voltage from the capacitor to the gate of the second transistor.

13. The driving method according to claim 12, wherein at least one of the first transistor and the second transistor comprises an oxide semiconductor.

14. The driving method according to claim 12, wherein the semiconductor device further comprises a third transistor, a fourth transistor, and a fifth transistor each having the same conductivity type as the second transistor.

15. The driving method according to claim 12, wherein the second potential is lower than a potential supplied to a first terminal of the second transistor.