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MULTI-LEVEL CLOCK SIGNAL DISTRIBUTION NETWORK AND INTEGRATED CIRCUIT

  • US 20140247080A1
  • Filed: 11/04/2011
  • Published: 09/04/2014
  • Est. Priority Date: 11/04/2011
  • Status: Active Grant
First Claim
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1. A multi-level clock signal distribution network, comprisinga plurality of lower network levels comprising at least a first lower network level and a lowermost network level that is connected to one or more lowermost clock signal driving circuits connectable to receive a clock signal;

  • anda topmost network level arranged to distribute said clock signal to a plurality of clocked circuits, and connected to a plurality of topmost clock signal driving circuits connected to receive said clock signal from said first lower network level;

    wherein said lowermost network level comprises at least one net and each of said plurality of lower network levels except said lowermost network level comprises a plurality of nets and is connected to a corresponding plurality of lower clock signal driving circuits being connected to receive said clock signal from a subjacent one of said plurality of lower network levels, wherein each of said plurality of nets is driven by all nets of said subjacent one.

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