Strained and Uniform Doping Technique for FINFETs

• US 20140252412A1
• Filed: 03/06/2013
• Published: 09/11/2014
• Est. Priority Date: 03/06/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Su-Hao, Tsai, Chun Hsiang
• Granted Patent: US 9,093,514 B2
• Time in Patent Office: Days
• US Class Current: 257/192
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 29/66477 with an insulated gate, i.e. MISFET
• CPC Class Codes: H01L 29/66803 with a step of doping the vertical sidewall, e.g. using tilted or multi-angled implants
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

The present disclosure relates to a device and method of forming enhanced channel carrier mobility within a transistor. Silicon carbon phosphorus (SiCP) source and drain regions are formed within the transistor with cyclic deposition etch (CDE) epitaxy, wherein both resistivity and strain are controlled by substitutional phosphorus. A carbon concentration of less than approximately 1% aids in control of the phosphorus dopant diffusion. Phosphorus dopant diffusion is also controlled by an anneal step which promotes uniform doping through both source and drain, as well as lightly-doped drain regions.

Claims

1. A method to form a strained channel within a field-effect transistor, comprising:

providing a substrate comprising a source region, a drain region, and a gate;

forming a lightly-doped drain region in a vicinity of a boundary between the gate and the drain region or the source region;

forming a recess within the source region or the drain region;

exposing the substrate to a pulse of a phosphorous-containing source vapor to deposit an epitaxial material in the recess;

exposing the substrate to a continuous etchant flow of one or more vapor etchants configured to selectively remove amorphous portions of the epitaxial material from the recess; and

alternating between repeated pulses of the phosphorous-containing source vapor and the continuous etchant flow for selective removal of the amorphous portions of the epitaxial material in the recess.

2. The method of claim 1, wherein the pulse further comprises a carbon-containing source vapor and a silicon-containing source vapor.

3. The method of claim 2, wherein the phosphorous-containing source vapor comprises PH₃ provided at a first flow rate of between approximately 260 standard cubic centimeters per minute (sccm) and approximately 310 sccm.

4. The method of claim 3, wherein the carbon-containing source vapor comprises monomethyl silane (MMS) provided at a second flow rate of between approximately 132 sccm and approximately 120 sccm.

5. The method of claim 4, wherein the silicon-containing source vapor comprises SiH₄ or Si3H₈ provided at a third flow rate of approximately 190 sccm.

6. The method of claim 5, wherein the epitaxial material comprises silicon carbon phosphorous (SiCP) and is deposited with a phosphorous concentration between approximately 2E+21 atoms/cm³ and approximately 5E+21 atoms/cm³ configured to produce a tensile strain within the channel.

7. The method of claim 6, wherein the SiCP is deposited with a carbon concentration between approximately 0.6% and approximately 0.7%, and wherein the carbon is configured to mitigate phosphorous diffusion from the recess.

8. The method of claim 6, wherein the epitaxial material comprises:

a layer of silicon carbide (SiC) disposed on a surface of the recess and configured to mitigate phosphorous diffusion from the recess, wherein the layer of SiC has a substitutional carbon concentration between approximately 0.5% and approximately 1% and has a first thickness between approximately 1 nm and approximately 20 nm; and

a layer of silicon phosphate (SiP) disposed on the layer of SiC and configured to produce the tensile strain within the channel, wherein the layer of SiP has a second thickness between approximately 10 nm and approximately 30 nm.

9. The method of claim 1, wherein formation of the lightly-doped drain comprises:

an ion implantation of a phosphorous-containing material or an arsenic-containing material at an energy between approximately 1 keV to approximately 3 keV and a dose of between approximately 1E+15 atoms/cm³ and approximately 5E+15 atoms/cm³; and

a post-implantation anneal comprising a millisecond anneal carried out at a first temperature between approximately 1100°

C. and 1200°

C. for a duration between approximately 0.9 ms and approximately 3 ms, or a laser anneal comprising a second temperature between approximately 1100°

C. and 1250°

C.

10. The method of claim 1, the one or more vapor etchants comprising:

Cl₂ or HCl;

GeH₄; and

a pressure between approximately 10 Torr and approximately 90 Torr.

11. A method for selectively forming an epitaxial material within a recess, comprising:

providing a substrate comprising the recess;

exposing the substrate to a pulse of a source vapor to deposit the epitaxial material in the recess, the source vapor comprising carbon, phosphorous, and silicon;

exposing the substrate to a continuous etchant flow of one or more vapor etchants configured to selectively remove amorphous portions of the epitaxial material from the recess; and

alternating between repeated pulses of the source vapor during and the continuous etchant flows for selective removal of the amorphous portions of the epitaxial material from the recess.

12. The method of claim 11, wherein exposing the substrate to the pulse of the source vapor comprises:

providing PH₃ at a first flow rate of between approximately 260 standard cubic centimeters per minute (sccm) and approximately 310 sccm;

providing monomethyl silane (MMS) at a second flow rate of between approximately 132 sccm and approximately 120 sccm; and

providing SiH₄ or Si3H₈ at a third flow rate of approximately 190 sccm.

13. The method of claim 11, wherein the epitaxial material comprises silicon carbon phosphorous (SiCP) and is deposited with a phosphorous concentration between approximately 2E+21 atoms/cm³ and approximately 5E+21 atoms/cm³.

14. The method of claim 13, wherein the SiCP is deposited with a carbon concentration between approximately 0.6% and approximately 0.7% configured to mitigate phosphorous diffusion from the recess.

15. The method of claim 11, wherein the epitaxial material comprises:

a layer of silicon carbide (SiC) disposed on a surface of the recess and configured to mitigate phosphorous diffusion from the recess, wherein the layer of SiC has a substitutional carbon concentration between approximately 0.5% and approximately 1% and has a first thickness between approximately 1 nm and approximately 20 nm; and

a layer of silicon phosphate (SiP) disposed on the layer of SiC configured to produce a tensile strain wherein the layer of SiP has a phosphorous concentration between approximately 2E+21 atoms/cm³ and approximately 5E+21 atoms/cm³ and has a second thickness between approximately 10 nm and approximately 30 nm.

16. The method of claim 11, the one or more vapor etchants comprising:

Cl₂ or HCl;

GeH₄; and

a pressure between approximately 10 Torr and approximately 90 Torr.

17. An n-type field-effect transistor (NFET), comprising:

a source region comprising a first epitaxial material disposed within a first recess, the first epitaxial material comprising a phosphorous concentration between approximately 2E+21 atoms/cm³ and approximately 5E+21 atoms/cm³;

a drain region comprising a second epitaxial material disposed within a second recess, the second epitaxial material further comprising the phosphorous concentration between approximately 2E+21 atoms/cm³ and approximately 5E+21 atoms/cm³;

a gate disposed above a channel region which resides between the source region and the drain region; and

a lightly-doped drain region in a vicinity of a boundary between the gate and the drain region or the source region;

wherein the first epitaxial material and the second epitaxial material comprise a layer of silicon carbide (SiC) disposed on a surface of the first recess or the second recess and a layer of silicon phosphate (SiP) disposed on the layer of SiC and are configured to produce a tensile strain within the channel region.

19. The NFET of claim 17,

wherein the layer of silicon carbide (SiC) has a substitutional carbon concentration between approximately 0.5% and approximately 1% and has a first thickness between approximately 1 nm and approximately 20 nm;

and

wherein the layer of silicon phosphate (SiP) has a second thickness between approximately 10 nm and approximately 30 nm.

20. The NFET of claim 17, further comprising a FINFET wherein a conformality ratio of phosphorous dopant between a bottom region and a side wall region of a fin is between approximately 0.5 and approximately 1.

18. (canceled)