THERMAL DESIGN AND ELECTRICAL ROUTING FOR MULTIPLE STACKED PACKAGES USING THROUGH VIA INSERT (TVI)

• US 20140252645A1
• Filed: 03/06/2013
• Published: 09/11/2014
• Est. Priority Date: 03/06/2013
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Kim, Dong Wook, Chiriac, Victor A., Hwang, Kyu-Pyung, Yun, Changhan, Song, Young K.
• Granted Patent: US 9,041,212 B2
• Time in Patent Office: Days
• US Class Current: 257/774
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06565 the devices having the same size and there being no auxiliary carrier between the devices
• CPC Class Codes: H01L 23/34 Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements thermal treatment apparatus H01L21/00
• CPC Class Codes: H01L 23/367 Cooling facilitated by shape of device H01L23/38, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/5384 Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors H01L23/5383, H01L23/5385 take precedence; pins attached to insulating substrates H01L23/49811
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

Some implementations provide a semiconductor package structure that includes a package substrate, a first package, an interposer coupled to the first package, and a first set of through via insert (TVI). The first set of TVI is coupled to the interposer and the package substrate. The first set of TVI is configured to provide heat dissipation from the first package. In some implementations, the semiconductor package structure further includes a heat spreader coupled to the interposer. The heat spreader is configured to dissipate heat from the first package. In some implementations, the first set of TVI is further configured to provide an electrical path between the first package and the package substrate. In some implementations, the first package is electrically coupled to the package substrate through the interposer and the first set of TVI. In some implementations, the first set of TVI includes a dielectric layer and a metal layer.

Claims

1. A semiconductor package structure comprising:

a package substrate;

a first package;

an interposer coupled to the first package; and

a first set of through via insert (TVI) coupled to the interposer and the package substrate, the first set of TVI configured to provide heat dissipation from the first package.

2. The semiconductor package structure of claim 1 further comprising a heat spreader coupled to the interposer, the heat spreader configured to dissipate heat from the first package.

3. The semiconductor package structure of claim 1, wherein the first set of TVI is further configured to provide an electrical path between the first package and the package substrate.

4. The semiconductor package structure of claim 1, wherein the first package is electrically coupled to the package substrate through the interposer and the first set of TVI.

5. The semiconductor package structure of claim 1, wherein the first set of TVI comprises a first dielectric layer and a first metal layer.

6. The semiconductor package structure of claim 5, wherein the first set of TVI is a laminate structure.

7. The semiconductor package structure of claim 1, further comprising:

a second package; and

a second set of through via insert (TVI) coupled to the interposer and the package substrate, the second set of TVI configured to provide heat dissipation from the second package.

8. The semiconductor package structure of claim 7, wherein the second set of TVI is further configured to provide an electrical path between the second package and the package substrate.

9. The semiconductor package structure of claim 7, wherein the interposer comprises a first set of traces and a second set of traces, the first set of traces coupled to the first package and the first set of TVI, the second set of traces coupled to the second package and the second set of TVI.

10. The semiconductor package structure of claim 1, wherein the semiconductor package structure is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

11. An apparatus comprising:

a package substrate;

a first package;

an interposer coupled to the first package; and

a first interconnect means for coupling the interposer and the package substrate, the first interconnect means configured to provide heat dissipation from the first package.

12. The apparatus of claim 11 further comprising a heat dissipating means configured to dissipate heat from the first package, the heat dissipating means coupled to the first interconnect means.

13. The apparatus of claim 11, wherein the first interconnect means is further configured to provide an electrical path between the first package and the package substrate.

14. The apparatus of claim 11, wherein the first package is electrically coupled to the package substrate through the interposer and the first interconnect means.

15. The apparatus of claim 11, wherein the first interconnect means comprises a first dielectric layer and a first metal layer.

16. The apparatus of claim 15, wherein the first interconnect means is a laminate structure.

17. The apparatus of claim 11, further comprising:

a second package; and

a second interconnect means for coupling the interposer and the package substrate, the second interconnect means configured to provide heat dissipation from the second package.

18. The apparatus of claim 17, wherein the second interconnect means is further configured to provide an electrical path between the second package and the package substrate.

19. The apparatus of claim 17, wherein the interposer comprises a first set of traces and a second set of traces, the first set of traces coupled to the first package and the first interconnect means, the second set of traces coupled to the second package and the second interconnect means.

20. The apparatus of claim 11, wherein the apparatus is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

21. A method for providing a semiconductor package structure, comprising:

providing a package substrate;

providing a first set of through via insert (TVI) on the package substrate;

coupling a first package to an interposer; and

coupling the interposer to the first set of TVI such that the first set of TVI is coupled to the interposer and the package substrate, the first set of TVI configured to provide heat dissipation from the first package.

22. The method of claim 21 further comprising coupling a heat spreader to the interposer, the heat spreader configured to dissipate heat from the first package.

23. The method of claim 21, wherein the first set of TVI is further configured to provide an electrical path between the first package and the package substrate.

24. The method of claim 21, wherein the first package is electrically coupled to the package substrate through the interposer and the first set of TVI.

25. The method of claim 21, wherein the first set of TVI comprises a first dielectric layer and a first metal layer.

26. The method of claim 25, wherein the first set of TVI is a laminate structure.

27. The method of claim 21, further comprising:

providing a second set of through via insert (TVI) on the package substrate

coupling a second package to the interposer; and

coupling the interposer to the second set of TVI such that the second set of TVI is coupled to the interposer and the package substrate, the second set of TVI configured to provide heat dissipation from the second package.

28. The method of claim 27, wherein the second set of TVI is further configured to provide an electrical path between the second package and the package substrate.

29. The method of claim 27, wherein the interposer comprises a first set of traces and a second set of traces, the first set of traces coupled to the first package and the first set of TVI, the second set of traces coupled to the second package and the second set of TVI.

30. The method of claim 21, further comprising incorporating the semiconductor package structure into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.