WIRELESS DEVICE WITH BUILT-IN SELF TEST (BIST) CAPABILITY FOR TRANSMIT AND RECEIVE CIRCUITS

• US 20140256376A1
• Filed: 05/01/2013
• Published: 09/11/2014
• Est. Priority Date: 03/11/2013
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Weissman, Haim Mendel, Brillant, Avigdor, Raviv, Lior, Taghivand, Mazhareddin, Tassoudji, Mohammad Ali, Ou, Yu-Chin
• Application Number:
  US13/875,083
• Publication Number:
  US 20140256376A1
• Time in Patent Office: Days
• US Class Current: 455/550.1
• CPC Class Codes: H04B 17/14 of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 Self-testing arrangements

Abstract

A wireless device with built-in self test (BIST) capability for testing/calibrating transmit and receive circuits is disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a first circuit and a second circuit. The first circuit (e.g., a transmitter or a mixer) provides a test signal to at least one transmit path. The test signal is electro-magnetically coupled from the output of the at least one transmit path to a test signal line. For example, the test signal may be provided from the at least one transmit path via at least one antenna feed line to at least one antenna element and may be electro-magnetically coupled from the at least one antenna feed line to the test signal line. The second circuit (e.g., a buffer, a receiver, or a mixer) processes a received test signal from the test signal line.

Claims

1. An apparatus comprising:

a first circuit configured to provide a test signal to at least one transmit path, the test signal being electro-magnetically coupled from output of the at least one transmit path to a test signal line; and

a second circuit configured to process a received test signal from the test signal line.

2. The apparatus of claim 1, the test signal being provided from the at least one transmit path via at least one antenna feed line to at least one antenna element and being electro-magnetically coupled from the at least one antenna feed line to the test signal line.

3. The apparatus of claim 1, the at least one transmit path comprising:

at least one power amplifier (PA) configured to amplify the test signal.

4. The apparatus of claim 3, the at least one transmit path further comprising:

at least one phase shifter coupled between the first circuit and the at least one PA.

5. The apparatus of claim 3, the at least one transmit path further comprising:

at least one signal splitter coupled between the first circuit and the at least one PA.

6. The apparatus of claim 3, further comprising:

at least one switch coupled between the first circuit and the at least one PA.

7. The apparatus of claim 1, the first circuit comprising:

at least one mixer configured to provide an output radio frequency (RF) signal in a first mode and to provide the test signal in a second mode.

8. The apparatus of claim 1, the second circuit comprising:

a buffer coupled to the test signal line and configured to buffer the received test signal.

9. The apparatus of claim 1, the second circuit comprising:

at least one mixer configured to downconvert an input radio frequency (RF) signal in a first mode and to downconvert the received test signal in a second mode.

10. The apparatus of claim 1, each of the at least one transmit path being tested separately by passing the test signal to one transmit path at a time.

11. The apparatus of claim 1, the at least one transmit path comprising a plurality of transmit paths coupled to a plurality of antenna elements, the plurality of transmit paths being tested concurrently by providing the test signal to the plurality of transmit paths.

12. The apparatus of claim 1, the at least one transmit path comprising multiple sets of transmit paths coupled to multiple sets of antenna elements for multiple antenna arrays.

13. The apparatus of claim 12, each of the multiple sets of transmit paths being tested separately by providing the test signal to one set of transmit paths at a time.

14. The apparatus of claim 12, the multiple sets of transmit paths being tested concurrently by providing the test signal to the multiple sets of transmit paths.

15. The apparatus of claim 2, the received test signal from the test signal line being electro-magnetically coupled to at least one additional antenna feed line between at least one additional antenna element and at least one receive path, and the second circuit configured to process the received test signal from the at least one receive path.

16. The apparatus of claim 1, the at least one transmit path comprising first and second sets of transmit paths, the test signal line comprising:

a first test signal line segment electro-magnetically coupled to output of the first set of transmit paths, and

a second test signal line segment electro-magnetically coupled to output of the second set of transmit paths.

17. The apparatus of claim 1, the first circuit and the second circuit being implemented on an integrated circuit (IC) chip, and the test signal line being implemented external to the IC chip.

18. A method comprising:

providing a test signal to at least one transmit path;

obtaining a received test signal via a test signal line electro-magnetically coupled to output of the at least one transmit path; and

processing the received test signal.

19. The method of claim 18, further comprising:

testing each of the at least one transmit path separately by passing the test signal to one transmit path at a time.

20. The method of claim 18, the at least one transmit path comprising multiple sets of transmit paths coupled to multiple sets of antenna elements for multiple antenna arrays, the method further comprising:

testing each of the multiple sets of transmit paths separately by passing the test signal to one set of transmit paths at a time.

21. An apparatus comprising:

means for providing a test signal to at least one transmit path;

means for obtaining a received test signal via a test signal line electro-magnetically coupled to output of the at least one transmit path; and

means for processing the received test signal.

22. An apparatus comprising:

a first circuit configured to provide an output radio frequency (RF) signal in a first mode and to provide a test signal to a test signal line in a second mode; and

at least one receive path configured to receive the test signal electro-magnetically coupled from the test signal line to input of the at least one receive path.

23. The apparatus of claim 22, the at least one receive path comprising:

at least one low noise amplifier (LNA) configured to amplify at least one received test signal in the second mode.

24. The apparatus of claim 23, the at least one receive path further comprising:

at least one phase shifter coupled between the at least one LNA and a receiver and configured to shift a phase of at least one received RF signal in the first mode or the at least one received test signal in the second mode.

25. The apparatus of claim 23, the at least one receive path further comprising:

at least one signal combiner coupled between the at least one LNA and a receiver and configured to combine at least one received RF signal from the at least one LNA.

26. A method comprising:

providing an output radio frequency (RF) signal with a first circuit in a first mode;

providing a test signal to a test signal line with the first circuit in a second mode;

obtaining at least one received test signal via electro-magnetic coupling from the test signal line to input of at least one receive path; and

processing the at least one received test signal with the at least one receive path in the second mode.