CIRCUIT BOARD WITH SIGNAL ROUTING LAYER HAVING UNIFORM IMPEDANCE
First Claim
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1. A circuit board, comprising:
- a signal routing layer comprising a plurality of connector traces, a plurality of chip traces, and a plurality of signal traces, each of the signal traces directly connecting to a respective one of the chip traces to a respective one of the connector traces, a width of the signal traces being greater than a width of the chip traces, while the width of the signal traces being less than a width of the connector traces;
a dielectric layer supporting the signal routing layer, the dielectric layer comprising a signal trace area carrying the signal traces, a chip trace area carrying the chip traces, and a connector trace area carrying the connector traces;
wherein a depth of the signal trace area is less than a depth of the connector trace area, while the depth of the signal trace area is greater than a depth of the chip trace area, so as to achieve an uniform impedance throughout all traces.
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Abstract
A circuit board includes a dielectric layer and a signal routing layer on the dielectric layer. The signal routing layer includes connector traces, chip traces, and signal traces connecting the two. A width of the signal traces is greater than a width of the chip traces, which is less than a width of the connector traces. The dielectric layer includes trace areas of different depths for each type of trace to achieve a uniform impedance throughout all traces.
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9 Claims
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1. A circuit board, comprising:
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a signal routing layer comprising a plurality of connector traces, a plurality of chip traces, and a plurality of signal traces, each of the signal traces directly connecting to a respective one of the chip traces to a respective one of the connector traces, a width of the signal traces being greater than a width of the chip traces, while the width of the signal traces being less than a width of the connector traces; a dielectric layer supporting the signal routing layer, the dielectric layer comprising a signal trace area carrying the signal traces, a chip trace area carrying the chip traces, and a connector trace area carrying the connector traces; wherein a depth of the signal trace area is less than a depth of the connector trace area, while the depth of the signal trace area is greater than a depth of the chip trace area, so as to achieve an uniform impedance throughout all traces. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification