METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A PROTECTED GATE CAP LAYER AND THE RESULTING DEVICE
First Claim
1. A method of forming a device comprised of a gate structure and a spacer structure positioned in a layer of insulating material, the method comprising:
- performing at least one etching process to recess said gate structure and said spacer structure and thereby form a recessed gate structure and a recessed spacer structure, said recessed gate structure, said recessed spacer structure and said layer of insulating material defining a spacer/gate cap recess;
forming a first gate cap protection layer above said layer of insulating material and in said spacer/gate cap recess;
forming a gate cap layer in said spacer/gate cap recess above said first gate cap protection layer, wherein an upper surface of said gate cap layer is positioned below an upper surface of said layer of insulating material;
forming a second gate cap protection layer on said upper surface of said gate cap layer and above at least said layer of insulating material; and
performing at least one process operation to remove portions of said first and second gate cap protection layers from above said layer of insulating material while leaving a portion of said second gate cap protection layer positioned on said upper surface of said gate cap layer.
8 Assignments
0 Petitions
Accused Products
Abstract
One method disclosed herein includes forming first and second gate cap protection layers that encapsulate and protect a gate cap layer. A novel transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate, a spacer structure positioned adjacent the gate structure, a layer of insulating material positioned above the substrate and around the spacer structure, a gate cap layer positioned above the gate structure and the spacer structure, and a gate cap protection material that encapsulates the gate cap layer, wherein portions of the gate cap protection material are positioned between the gate cap layer and the gate structure, the spacer structure and the layer of insulating material.
30 Citations
23 Claims
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1. A method of forming a device comprised of a gate structure and a spacer structure positioned in a layer of insulating material, the method comprising:
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performing at least one etching process to recess said gate structure and said spacer structure and thereby form a recessed gate structure and a recessed spacer structure, said recessed gate structure, said recessed spacer structure and said layer of insulating material defining a spacer/gate cap recess; forming a first gate cap protection layer above said layer of insulating material and in said spacer/gate cap recess; forming a gate cap layer in said spacer/gate cap recess above said first gate cap protection layer, wherein an upper surface of said gate cap layer is positioned below an upper surface of said layer of insulating material; forming a second gate cap protection layer on said upper surface of said gate cap layer and above at least said layer of insulating material; and performing at least one process operation to remove portions of said first and second gate cap protection layers from above said layer of insulating material while leaving a portion of said second gate cap protection layer positioned on said upper surface of said gate cap layer. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of forming a device comprised of a gate structure and a spacer structure positioned in a layer of insulating material, the method comprising:
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performing at least one etching process to recess said gate structure and said spacer structure and thereby form a recessed gate structure and a recessed spacer structure, said recessed gate structure, said recessed spacer structure and said layer of insulating material defining a spacer/gate cap recess; forming a first gate cap protection layer on said layer of insulating material and in said spacer/gate cap recess; forming a gate cap layer in said spacer/gate cap recess above said first gate cap protection layer, wherein an upper surface of said gate cap layer is positioned below an upper surface of said layer of insulating material; forming a second gate cap protection layer on said upper surface of said gate cap layer and on said first gate cap protection layer, wherein said first and second gate cap protection layers are comprised of materials having a dielectric constant that is greater than a dielectric constant of a material of said gate cap layer; and performing at least one process operation to remove portions of said first and second gate cap protection layers from above said layer of insulating material while leaving a portion of said second gate cap protection layer positioned on said upper surface of said gate cap layer. - View Dependent Claims (9, 10, 11)
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12. A transistor device, comprising:
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a gate structure positioned above a semiconductor substrate; a spacer structure positioned adjacent said gate structure; a layer of insulating material positioned above said substrate and around said spacer structure; a first gate cap protection layer positioned on said gate structure, said spacer structure and portions of said layer of insulating material; a gate cap layer positioned on said first gate cap protection layer, wherein sidewalls and a bottom surface of said gate cap layer each contact said first gate cap protection layer; and a second gate cap protection layer positioned on an upper surface of said gate cap layer, wherein said first and second gate cap protection layers encapsulate said gate cap layer. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. A transistor device, comprising:
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a gate structure positioned above a semiconductor substrate; a spacer structure positioned adjacent said gate structure; a layer of insulating material positioned above said substrate and around said spacer structure; a gate cap layer positioned above said gate structure and said spacer structure; and a gate cap protection material that encapsulates said gate cap layer, wherein portions of said gate cap protection material are positioned between said gate cap layer and said gate structure, said spacer structure and said layer of insulating material. - View Dependent Claims (20, 21, 22, 23)
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Specification