SEMICONDUCTOR DEVICE WITH POST-PASSIVATION INTERCONNECT STRUCTURE AND METHOD OF FORMING THE SAME

• US 20140264837A1
• Filed: 04/25/2013
• Published: 09/18/2014
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Hsien-Wei, Yu, Tsung-Yuan, Tsai, Hao-Yi, Lii, Mirng-Ji, Yu, Chen-Hua
• Granted Patent: US 9,013,038 B2
• Time in Patent Office: Days
• US Class Current: 257/737
• CPC Class Codes: H01L 2224/02233 not in direct contact with the bonding area
• CPC Class Codes: H01L 2224/02235 Reinforcing structures
• CPC Class Codes: H01L 2224/02351 comprising interlocking features
• CPC Class Codes: H01L 2224/02375 Top view
• CPC Class Codes: H01L 2224/02381 Side view
• CPC Class Codes: H01L 2224/03013 for holding or confining the bonding area, e.g. solder flow barrier
• CPC Class Codes: H01L 2224/03019 for protecting parts during the process
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05555 being circular or elliptic
• CPC Class Codes: H01L 2224/05557 comprising protrusions or indentations
• CPC Class Codes: H01L 2224/05558 conformal layer on a patterned surface
• CPC Class Codes: H01L 2224/05567 the external layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05569 the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05666 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05681 : Tantalum [Ta] as principal constituent
• CPC Class Codes: H01L 2224/1146 : Plating
• CPC Class Codes: H01L 2224/11849 : Reflowing
• CPC Class Codes: H01L 2224/1191 : Forming a passivation layer after forming the bump connector
• CPC Class Codes: H01L 2224/13006 : Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/13022 : the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/13024 : the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/13111 : Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13113 : Bismuth [Bi] as principal constituent
• CPC Class Codes: H01L 2224/13147 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/8385 : using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 23/3114 : the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/3171 : the coating being directly applied to the semiconductor body, e.g. passivation layer H01L23/3178 takes precedence
• CPC Class Codes: H01L 23/3192 : Multilayer coating
• CPC Class Codes: H01L 23/49811 : Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/525 : with adaptable interconnections
• CPC Class Codes: H01L 23/53209 : based on metals, e.g. alloys, metal silicides H01L23/53285 takes precedence
• CPC Class Codes: H01L 23/53214 : the principal metal being aluminium
• CPC Class Codes: H01L 23/53228 : the principal metal being copper
• CPC Class Codes: H01L 23/53242 : the principal metal being a noble metal, e.g. gold
• CPC Class Codes: H01L 23/53257 : the principal metal being a refractory metal
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A semiconductor device, including a protective layer overlying a contact pad and a dummy pad on a semiconductor substrate, an interconnect structure overlying the protective layer and contacting part of the dummy pad through a contact via passing through the protective layer, a bump overlying the interconnect structure positioned over the dummy pad.

Claims

1. A semiconductor device, comprising:

a contact pad and a dummy pad overlying a semiconductor substrate;

a protective layer overlying the contact pad and the dummy pad;

an interconnect structure overlying the protective layer and comprising a mounting pad portion positioned over the dummy pad, wherein the mounting pad portion comprises a contact via passing through the protective layer and contacting part of the dummy pad; and

a bump overlying the mounting pad portion of the interconnect structure.

2. The semiconductor device of claim 1, wherein the interconnect structure comprises a contacting pad portion positioned over the contact pad and electrically connected to the contact pad through an opening in the protective layer.

3. The semiconductor device of claim 2, wherein the interconnect structure comprises a trace portion connecting the mounting pad portion and the contacting pad portion.

4. The semiconductor device of claim 1, further comprising a molding compound overlying the interconnect structure and being in physical contact with a lower portion of the bump.

5. The semiconductor device of claim 1, wherein the contact pad and the dummy pad are formed at the same level overlying the semiconductor substrate.

6. The semiconductor device of claim 1, further comprising a passivation layer between the protective layer and the dummy pad.

7. The semiconductor device of claim 1, wherein the contact via has a diameter in a range between about 20 μ

m and about 100 μ

m.

8. The semiconductor device of claim 1, wherein the mounting pad portion comprises a plurality of contact vias passing through the protective layer and contacting part of the dummy pad.

9. The semiconductor device of claim 8, wherein a space between two adjacent contact vias is about 20 μ

m or greater.

10. The semiconductor device of claim 1, wherein a distance from an edge of the mounting pad portion to an edge of the contact via is about 5 μ

m or greater.

11. The semiconductor device of claim 1, wherein a distance from an edge of the mounting pad portion to an edge of the dummy pad is about 5 μ

m or greater.

12. The semiconductor device of claim 1, wherein the dummy pad comprises aluminum or aluminum alloy.

13. The semiconductor device of claim 1, wherein the interconnect structure comprises copper or copper alloy.

14. A semiconductor device, comprising:

a contact pad and a dummy pad overlying a semiconductor substrate;

a protective layer overlying the contact pad and the dummy pad, wherein the protective layer has a first opening exposing part of the contact pad and a second opening exposing part of the dummy pad;

an interconnect structure overlying the protective layer, wherein the interconnect structure comprises;

a first portion positioned over the contact pad and electrically connected to the contact pad through the first opening of the protective layer; and

a second portion positioned over the dummy pad and physically contacting the dummy pad through the second opening of the protective layer; and

a bump physically contacting the second portion of the interconnect structure.

15. The semiconductor device of claim 14, wherein the interconnect structure comprises a third portion connecting the first portion and the second portion.

16. The semiconductor device of claim 14, further comprising a molding compound overlying the interconnect structure, wherein the bump is partially buried in the molding compound.

17. The semiconductor device of claim 14, further comprising a passivation layer between the protective layer and the dummy pad.

18. The semiconductor device of claim 14, wherein the protective layer comprises a plurality of second openings, and the second portion of the interconnect structure physically contacts the dummy pad through the plurality of second openings.

19. A method of forming a semiconductor device, comprising:

forming a contact pad over a semiconductor substrate;

forming a dummy pad over a semiconductor substrate, spaced apart from the contact pad;

forming a polymer layer overlying the contact pad, the dummy pad and the semiconductor substrate;

forming a first opening in the polymer layer, exposing a portion of the contact pad;

forming a second opening in the polymer layer, exposing a portion of the dummy pad;

forming a conductive layer overlying the polymer layer and contacting the exposed portions of the contact pad and the dummy pad through the first opening and the second opening; and

forming a bump on the conductive layer, positioned over the dummy pad.

20. The method of claim 19, further comprising forming a molding compound on the conductive layer and covering a lower portion of the bump.