DIGITALLY ASSISTED REGULATION FOR AN INTEGRATED CAPLESS LOW-DROPOUT (LDO) VOLTAGE REGULATOR

• US 20140266103A1
• Filed: 03/15/2013
• Published: 09/18/2014
• Est. Priority Date: 03/15/2013
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Wang, Yuhe, Pedrali-Noy, Marzio, Huang, Xuhao, Chen, Xufeng, Saint-Laurent, Martin
• Application Number:
  US13/843,121
• Publication Number:
  US 20140266103A1
• Time in Patent Office: Days
• US Class Current: 323/274
• CPC Class Codes: G05F 1/462 as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
• CPC Class Codes: G05F 1/565 sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor G05F1/563 takes precedence
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit

Abstract

Techniques are described that embed a digital assisted regulator with an LDO regulator on a chip without requiring a capacitor external to the chip and to regulate a voltage without undershoot. The digital assisted regulator responds to information regarding operation of the LDO regulator and to a signal that provides advance notification of a load change. When the advance notification signal is received, the digital assisted regulator pulls a circuit'"'"'s supply voltage up to a chip'"'"'s incoming supply voltage. When the correct operating voltage has been reached and any undershoot problem removed, the digital assisted regulator balances the current it provides with the current provided by the LDO regulator, to allow a quick response time for other load changes. Also, bandwidth of an LDO regulator may be expanded by use of an advance notice signal to increase bias current of an LDO output device to meet an upcoming load change.

Claims

1. A method for low-dropout regulation, the method comprising:

enabling a digital to analog converter (DAC) in response to an advance notification signal supplied by a system circuit, wherein the advance notification signal indicates a change in load requiring increased current is to begin in a predetermined period; and

combining a current provided by the DAC with a current provided by a low-dropout (LDO) regulator to supply the system circuit, wherein voltage undershoot to the system circuit is reduced or removed.

2. The method of claim 1, wherein the current provided by the DAC is decreased until an operating voltage is reached for the system circuit.

3. The method of claim 1, wherein the current provided by the DAC is decreased to a level that balances the remaining load current supplied by the LDO to be within a predetermined range.

4. The method of claim 3, wherein the DAC and the LDO regulator are embedded within the system circuit without requiring an external package pin connection to an external capacitor.

5. The method of claim 1 further comprising:

monitoring the current provided by the LDO regulator by a current analog to digital converter to indicate whether the LDO output current is too high or too low.

6. The method of claim 1 further comprising:

Monitoring the current provided by the LDO regulator by a current analog to digital converter to indicate whether the LDO output current is too high, at a mid range operating level, or too low.

7. An apparatus for low-dropout regulation, the apparatus comprising:

a low-dropout (LDO) regulator configured to provide linear regulation of voltage and current;

a digital assisted regulator coupled to the LDO regulator and configured to provide digital assisted regulation of voltage and current; and

a system circuit coupled to the digital assisted regulator and to the LDO regulator to receive supply voltage and current and having an advance notification circuit that is configured to notify the digital assisted regulator of an impending load change in time for the digital assisted regulator to supply current to the system circuit required by the load change.

8. The apparatus of claim 7 further comprising:

a current analog to digital converter (IADC) configured to monitor current associated with the LDO regulator and provide information in digital form to the digital controller representing a level of current provided by the LDO regulator.

9. The apparatus of claim 8, wherein the IADC comprises:

a threshold comparator that monitor current associated with an LDO output device and indicates whether the LDO output current is too high or too low.

10. The apparatus of claim 8, wherein the IADC comprises:

threshold comparators that monitor current associated with the LDO output device and indicates whether the LDO output current is too high, at a mid-range operating level, or too low.

11. The apparatus of claim 7, wherein the transistor assembly comprises:

a plurality of transistors controlled by the digital controller in groups to increase or decrease current supplied to the system circuit.

12. The apparatus of claim 7, wherein the transistor assembly is driven by the digital controller to pull the supply voltage for the system circuit up toward a chip'"'"'s incoming supply voltage.

13. The apparatus of claim 7, wherein the digital controller takes input from a current analog to digital controller that indicates how much current the LDO regulator is sourcing and in response controls a ramp down of the supply voltage to a specified operating voltage of the system circuit, wherein voltage undershoot to the system circuit is reduced or removed.

14. The apparatus of claim 7, wherein the digital controller and the transistor assembly handle static current requirements of the system circuit while the LDO regulator handles high frequency dynamic current requirements of the system circuit.

15. The apparatus of claim 7, the digital controller and the transistor assembly extends static current capacity of the LDO regulator to support supplying on chip leakage.

16. An apparatus for system assisted low-dropout regulation, the apparatus comprising:

a system circuit having an advance notification circuit configured to generate an advance notification signal that a load change is to occur in a predetermined time period; and

a low-dropout (LDO) regulator for providing linear regulation of voltage and current to the system circuit, coupled to the system circuit to receive the advance notification signal and expand the bandwidth of the LDO regulator during the time of the load change in response to the advance notification signal.

17. The apparatus of claim 16 further comprises:

a Miller compensation capacitor to stabilize the LDO regulator; and

a variable resistor circuit that in combination with the Miller compensation capacitor provides compensation for a particular load current required by the system circuit.

18. The apparatus of claim 17, wherein the value of the variable resistor circuit tracks the change of the load current to the system circuit, wherein the LDO regulator provides stable current supply over a wide range of current requirements.

19. A computer readable non-transitory medium encoded with computer readable program data and code, the program data and code when executed operable to:

enable a digital to analog converter (DAC) in response to an advance notification signal supplied by a system circuit, wherein the advance notification signal indicates a change in load requiring increased current is to begin in a predetermined period; and

combine a current provided by the enabled DAC with a current provided by a low-dropout (LDO) regulator to supply the system circuit, wherein voltage undershoot to the system circuit is reduced or removed.

20. An apparatus for low-dropout regulation, the apparatus comprising:

means for digital assisted regulation of a voltage and current;

means for linear regulation of a voltage and current coupled to the digital regulation means and configured to operate in conjunction with the digital regulation means; and

means for providing an advance notification to the digital regulation means of an impending load change in time to supply current to the system circuit required by the load change.

21. An apparatus for system assisted low-dropout regulation, the apparatus comprising:

means to generate an advance notification signal that a load change is to occur in a predetermined time period; and

means to receive the advance notification signal and expand the bandwidth of the LDO regulator during the time of the load change in response to the advance notification signal.