MEMORY CELL WITH VOLATILE AND NON-VOLATILE STORAGE
First Claim
1. A non-volatile memory element comprising:
- first and second transistors forming an inverter coupled between a first storage node and an output of the memory element;
a third transistor coupled between the first storage node and a first supply voltage and comprising a control terminal coupled to said output;
a first resistance switching element coupled in series with said third transistor and programmed to have one of first and second resistances representing a non-volatile data bit;
a fourth transistor coupled between said storage node a second supply voltage; and
control circuitry adapted to activate said third transistor at the start of a transfer phase of said non-volatile data bit to said storage node, and to control said fourth transistor to couple said storage node to said second supply voltage during said transfer phase.
2 Assignments
0 Petitions
Accused Products
Abstract
The invention concerns a non-volatile memory element comprising: first and second transistors (106, 108) forming an inverter (104) coupled between a first storage node (112) and an output (110) of the memory element; a third transistor (116) coupled between the first storage node (112) and a first supply voltage (GND, VDD) and comprising a control terminal coupled to said output; a first resistance switching element (102) coupled in series with said third transistor and programmed to have one of first and second resistances (Rmin, Rmax) representing a non-volatile data bit; a fourth transistor (118) coupled between said storage node (112) a second supply voltage (VDD, GND); and control circuitry (130) adapted to activate said third transistor at the start of a transfer phase of said non-volatile data bit to said storage node, and to control said fourth transistor to couple said storage node to said second supply voltage during said transfer phase.
-
Citations
16 Claims
-
1. A non-volatile memory element comprising:
-
first and second transistors forming an inverter coupled between a first storage node and an output of the memory element; a third transistor coupled between the first storage node and a first supply voltage and comprising a control terminal coupled to said output; a first resistance switching element coupled in series with said third transistor and programmed to have one of first and second resistances representing a non-volatile data bit; a fourth transistor coupled between said storage node a second supply voltage; and control circuitry adapted to activate said third transistor at the start of a transfer phase of said non-volatile data bit to said storage node, and to control said fourth transistor to couple said storage node to said second supply voltage during said transfer phase. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 16)
-
-
14. A method of transferring a data value from non-volatile storage of a memory element to a volatile storage node of said memory element, wherein the memory element comprises first and second transistors forming an inverter coupled between a storage node and an output of the memory element, a third transistor coupled between the storage node and a first supply voltage and comprising a control terminal coupled to said output, and a first resistance switching element coupled in series with said third transistor and programmed to have one of first and second resistances representing a non-volatile data bit, the method comprising:
-
activating said third transistor; and coupling said storage node to a second supply voltage while said third transistor is activated.
-
Specification