REUSING A SINGLE-CHIP CARRIER AGGREGATION RECEIVER TO SUPPORT NON-CELLULAR DIVERSITY

• US 20140269853A1
• Filed: 03/14/2013
• Published: 09/18/2014
• Est. Priority Date: 03/14/2013
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Gudem, Prasad Srinivasa Siva, Zhao, Liang, Ko, Jin-Su, Kim, Hong Sun
• Granted Patent: US 8,995,591 B2
• Time in Patent Office: Days
• US Class Current: 375/219
• CPC Class Codes: H04B 1/0064 with separate antennas for the more than one band H04B1/0053 takes precedence
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 7/02 Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas RAKE receivers H04B1/7115
• CPC Class Codes: H04B 7/04 using two or more spaced independent antennas
• CPC Class Codes: H04B 7/0837 using pre-detection combining H04B7/0868 takes precedence
• CPC Class Codes: H04L 5/0098 Signalling of the activation or deactivation of component carriers, subcarriers or frequency bands

Abstract

A wireless communication device configured for receiving multiple signals is described. The wireless communication device includes a single-chip carrier aggregation receiver architecture. The single-chip carrier aggregation receiver architecture includes a first antenna, a second antenna, a third antenna, a fourth antenna and a transceiver chip. The transceiver chip includes multiple carrier aggregation receivers. The single-chip carrier aggregation receiver architecture reuses at least one of the carrier aggregation receivers for secondary diversity.

Claims

1. A wireless communication device configured for receiving multiple signals, comprising:

a single-chip carrier aggregation receiver architecture that comprises;

a first antenna;

a second antenna;

a third antenna;

a fourth antenna; and

a transceiver chip, wherein the transceiver chip comprises multiple carrier aggregation receivers, and wherein the single-chip carrier aggregation receiver architecture reuses at least one of the carrier aggregation receivers for secondary diversity.

2. The wireless communication device of claim 1, wherein the multiple carrier aggregation receivers comprise:

a first receiver;

a second receiver;

a third receiver; and

a fourth receiver, and wherein the transceiver chip further comprises;

a transmitter; and

a fifth receiver.

3. The wireless communication device of claim 2, wherein the multiple carrier aggregation receivers each comprise multiple low noise amplifiers, and wherein the fifth receiver comprises multiple low noise amplifiers.

4. The wireless communication device of claim 2, wherein the fifth receiver is a non-carrier aggregation receiver.

5. The wireless communication device of claim 2, wherein the fifth receiver is a non-simultaneous hybrid dual receiver.

6. The wireless communication device of claim 2, wherein the fifth receiver is a global navigation satellite system receiver.

7. The wireless communication device of claim 2, wherein the fifth receiver is a Bluetooth receiver.

8. The wireless communication device of claim 2, wherein the fifth receiver is a Wi-Fi receiver.

9. The wireless communication device of claim 2, wherein a first secondary routing is used from the third antenna through the fourth receiver to obtain a fourth Rx inphase/quadrature signal, and wherein a second secondary routing is used from the fourth antenna through the fifth receiver to obtain a fifth Rx inphase/quadrature signal.

10. The wireless communication device of claim 9, wherein the first secondary routing passes through a first 4Rx low noise amplifier, and wherein the second secondary routing passes through a first 5Rx low noise amplifier and a second 5Rx low noise amplifier.

11. The wireless communication device of claim 9, wherein the first receiver comprises a first mixer, wherein the second receiver comprises a second mixer, wherein the third receiver comprises a third mixer, wherein the fourth receiver comprises a fourth mixer, and wherein the fifth receiver comprises a fifth mixer.

12. The wireless communication device of claim 11 wherein the first secondary routing passes through the fourth mixer.

13. The wireless communication device of claim 12, wherein the fourth mixer is driven by a voltage controlled oscillator on the second receiver.

14. The wireless communication device of claim 12, wherein the fourth mixer is driven by a voltage controlled oscillator on the fifth receiver.

15. The wireless communication device of claim 12, further comprising a sixth mixer on the fourth receiver, wherein the sixth mixer is driven by a voltage controlled oscillator on the fifth receiver.

16. The wireless communication device of claim 12, further comprising a sixth mixer on the fifth receiver, and wherein the sixth mixer is driven by a voltage controlled oscillator on the fifth receiver.

17. The wireless communication device of claim 9, wherein the first secondary routing passes through a first 5RX low noise amplifier, and wherein the second secondary routing passes through a second 5RX low noise amplifier.

18. The wireless communication device of claim 9, wherein the fourth Rx inphase/quadrature signal and the fifth Rx inphase/quadrature signal pass through a baseband digital modem.

19. The wireless communication device of claim 18, wherein the baseband digital modem comprises:

a first analog-to-digital converter;

a first baseband processor;

a controller;

a second analog-to-digital converter;

a digital front end; and

a sample memory.

20. The wireless communication device of claim 19, wherein the first analog-to-digital converter is a global navigation satellite system analog-to-digital converter, wherein the controller is a global navigation satellite system controller, wherein the second analog-to-digital converter is a wireless wideband area network analog-to-digital converter, wherein the digital front end is a wireless wideband area network digital front end, and wherein the sample memory is a wideband area network sample memory.

21. The wireless communication device of claim 19, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first baseband processor and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through a third analog-to-digital converter, a second baseband processor and the controller.

22. The wireless communication device of claim 21, wherein the third analog-to-digital converter is a global navigation satellite system analog-to-digital converter.

23. The wireless communication device of claim 19, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first baseband processor and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, a second baseband processor and the controller.

24. The wireless communication device of claim 19, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first baseband processor and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the digital front end, a second baseband processor and the controller.

25. The wireless communication device of claim 18, wherein the baseband digital modem comprises:

a first analog-to-digital converter;

a first digital front end;

a controller;

a second analog-to-digital converter;

a second digital front end; and

a sample memory.

26. The wireless communication device of claim 25, wherein the first analog-to-digital converter is a wireless wideband area network analog-to-digital converter, wherein the first digital front end is a wireless wideband area network digital front end, wherein the controller is a wireless wideband area network controller, wherein the second analog-to-digital converter is a wireless wideband area network analog-to-digital converter, wherein the second digital front end is a wireless wideband area network digital front end, and wherein the sample memory is a wideband area network sample memory.

27. The wireless communication device of claim 25, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first digital front end and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through a third analog-to-digital converter, a third digital front end and the controller.

28. The wireless communication device of claim 25, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first digital front end and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, a third digital front end and the controller.

29. The wireless communication device of claim 25, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first digital front end and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the controller.

30. A method for receiving multiple signals using a single-chip carrier aggregation receiver architecture that comprises a first antenna, a second antenna, a third antenna and a fourth antenna, the method comprising:

receiving a first secondary signal using the third antenna;

routing the first secondary signal through a fourth receiver on a transceiver chip in the single-chip carrier aggregation receiver architecture, wherein the fourth receiver is one of multiple carrier aggregation receivers, and wherein the fourth receiver is reused for secondary diversity;

receiving a second secondary signal using the fourth antenna; and

routing the second secondary signal through a fifth receiver on a transceiver chip in the single-chip carrier aggregation receiver architecture.

31. The method of claim 30, wherein the first secondary routing is used to obtain a fourth Rx inphase/quadrature signal, and wherein the second secondary routing is used to obtain a fifth Rx inphase/quadrature signal.

32. The method of claim 30, wherein the fifth receiver is a non-carrier aggregation receiver.

33. The method of claim 30, wherein the fifth receiver is a non-simultaneous hybrid dual receiver.

34. The method of claim 30, wherein the fifth receiver is a global navigation satellite system receiver.

35. The method of claim 30, wherein the fifth receiver is a Bluetooth receiver.

36. The method of claim 30, wherein the fifth receiver is a Wi-Fi receiver.

37. The method of claim 30, wherein the first secondary signal is further routed through a first 4RX low noise amplifier, and wherein the second secondary signal is further routed through a first 5RX low noise amplifier and a second 5RX low noise amplifier.

38. The method of claim 30, wherein the multiple carrier aggregation receivers comprise:

a first receiver;

a second receiver;

a third receiver; and

the fourth receiver.

39. The method of claim 38, wherein the multiple carrier aggregation receivers each comprise multiple low noise amplifiers, and wherein the fifth receiver comprises multiple low noise amplifiers.

40. The method of claim 38, wherein the multiple carrier aggregation receivers comprise:

a first mixer on the first receiver;

a second mixer on the second receiver;

a third mixer on the third carrier; and

a fourth mixer on the fourth receiver, and wherein the fifth receiver comprises a fifth mixer.

41. The method of claim 40 wherein the first secondary signal is further routed through the fourth mixer.

42. The method of claim 41, wherein the fourth mixer is driven by a voltage controlled oscillator on the second receiver.

43. The method of claim 41, wherein the fourth mixer is driven by a voltage controlled oscillator on the fifth receiver.

44. The method of claim 41, wherein the transceiver chip further comprises a sixth mixer on the fourth receiver, and wherein the sixth mixer is driven by a voltage controlled oscillator on the fifth receiver.

45. The method of claim 41, wherein the transceiver chip further comprises a sixth mixer on the fifth receiver, and wherein the sixth mixer is driven by a voltage controlled oscillator on the fifth receiver.

46. The method of claim 30, wherein the first secondary signal is routed through a first 5RX low noise amplifier, and wherein the second secondary signal is routed through a second 5RX low noise amplifier.

47. The method of claim 30, wherein the fourth Rx inphase/quadrature signal and the fifth Rx inphase/quadrature signal pass through a baseband digital modem.

48. The method of claim 47, wherein the baseband digital modem comprises:

a first analog-to-digital converter;

a first baseband processor;

a controller;

a second analog-to-digital converter;

a digital front end; and

a sample memory.

49. The method of claim 48, wherein the first analog-to-digital converter is a global navigation satellite system analog-to-digital converter, wherein the controller is a global navigation satellite system controller, wherein the second analog-to-digital converter is a wireless wideband area network analog-to-digital converter, wherein the digital front end is a wireless wideband area network digital front end, and wherein the sample memory is a wideband area network sample memory.

50. The method of claim 48, wherein the fourth Rx inphase/quadrature signal further passes through the first analog-to-digital converter, the first baseband processor, and the controller, wherein the fifth Rx inphase/quadrature signal further passes through the second analog-to-digital converter, the digital front end, and the sample memory, and wherein the fifth Rx inphase/quadrature signal further passes through a third analog-to-digital converter, a second baseband processor, and the controller.

51. The method of claim 50, wherein the third analog-to-digital converter is a global navigation satellite system analog-to-digital converter.

52. The method of claim 48, wherein the fourth Rx inphase/quadrature signal further passes through the first analog-to-digital converter, the first baseband processor, and the controller, wherein the fifth Rx inphase/quadrature signal further passes through the second analog-to-digital converter, the digital front end, and the sample memory, and wherein the fifth Rx inphase/quadrature signal further passes through the second analog-to-digital converter, a second baseband processor, and the controller.

53. The method of claim 48, wherein the fourth Rx inphase/quadrature signal further passes through the first analog-to-digital converter, the first baseband processor, and the controller, wherein the fifth Rx inphase/quadrature signal further passes through the second analog-to-digital converter, the digital front end, and the sample memory, and wherein the fifth Rx inphase/quadrature signal further passes through the second analog-to-digital converter, the digital front end, a second baseband processor, and the controller.

54. The method of claim 47, wherein the baseband digital modem comprises:

a first analog-to-digital converter;

a first digital front end;

a controller;

a second analog-to-digital converter;

a second digital front end; and

a sample memory.

55. The method of claim 54, wherein the first analog-to-digital converter is a wireless wideband area network analog-to-digital converter, wherein the first digital front end is a wireless wideband area network digital front end, wherein the controller is a wireless wideband area network controller, wherein the second analog-to-digital converter is a wireless wideband area network analog-to-digital converter, wherein the second digital front end is a wireless wideband area network digital front end, and wherein the sample memory is a wideband area network sample memory.

56. The method of claim 54, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first digital front end and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through a third analog-to-digital converter, a third digital front end and the controller.

57. The method of claim 54, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first digital front end and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, a third digital front end and the controller.

58. The method of claim 54, wherein the fourth Rx inphase/quadrature signal passes through the first analog-to-digital converter, the first digital front end and the controller, wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the sample memory, and wherein the fifth Rx inphase/quadrature signal passes through the second analog-to-digital converter, the second digital front end and the controller.

59. A computer-program product for receiving multiple signals using a single-chip carrier aggregation receiver architecture that comprises a first antenna, a second antenna, a third antenna and a fourth antenna, the computer-program product comprising a non-transitory computer-readable medium having instructions thereon, the instructions comprising:

code for causing a wireless communication device to receive a first secondary signal using the third antenna;

code for causing the wireless communication device to route the first secondary signal through a fourth receiver on a transceiver chip in the single-chip carrier aggregation receiver architecture, wherein the fourth receiver is one of multiple carrier aggregation receivers, and wherein the fourth receiver is reused for secondary diversity;

code for causing the wireless communication device to receive a second secondary signal using the fourth antenna; and

code for causing the wireless communication device to route the second secondary signal through a fifth receiver on a transceiver chip in the single-chip carrier aggregation receiver architecture.

60. The computer-program product of claim 59, wherein the first secondary routing is used to obtain a fourth Rx inphase/quadrature signal, and wherein the second secondary routing is used to obtain a fifth Rx inphase/quadrature signal.

61. An apparatus for receiving multiple signals using a single-chip carrier aggregation receiver architecture that comprises a first antenna, a second antenna, a third antenna and a fourth antenna, comprising:

means for receiving a first secondary signal using the third antenna;

means for routing the first secondary signal through a fourth receiver on a transceiver chip in the single-chip carrier aggregation receiver architecture, wherein the fourth receiver is one of multiple carrier aggregation receivers, and wherein the fourth receiver is reused for secondary diversity;

means for receiving a second secondary signal using the fourth antenna; and

means for routing the second secondary signal through a fifth receiver on a transceiver chip in the single-chip carrier aggregation receiver architecture.

62. The apparatus of claim 62, wherein the first secondary routing is used to obtain a fourth Rx inphase/quadrature signal, and wherein the second secondary routing is used to obtain a fifth Rx inphase/quadrature signal.