CURRENT SENSING MULTIPLE OUTPUT CURRENT STIMULATORS
First Claim
1. A multiple output current stimulator circuit comprising:
- a reference voltage source to provide a reference voltage;
a plurality of input side transistors;
a plurality of output side transistors current mirror coupled to respective ones of the input side transistors, the output side transistors coupled together to provide a common sensing voltage, each one of the output side transistors having a current output terminal for providing a respective output current;
a supply transistor switchably coupled in cascode arrangement between each input side transistor and a predetermined voltage port;
a differential amplifier comprising;
a first input coupled to the reference voltage;
a second input coupled to the common sensing voltage; and
an output arranged to drive the supply transistor as a function of the difference between the reference voltage and the common sensing voltage; and
a switching control circuit configured to selectively activate each one of the input side transistors so as to cause the corresponding current mirrored output side transistor to provide a respective output current in accordance with the corresponding input side transistor current.
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Accused Products
Abstract
A multiple output current stimulator circuit with fast turn on time is described. At least one pair of input side and output side transistors is arranged in a current mirror connected to a supply transistor by cascode coupling. The output side transistor supplies stimulation current to an electrode in contact with tissue. An operational amplifier connected to a reference voltage and to the output side transistor drives the supply transistor to maintain the voltage at the output side transistor equal to the reference voltage. The at least one pair of transistors includes multiple pairs of transistors whose output side transistors drive respective electrodes with stimulation currents. The stimulator determines the initiation and duration of stimulation current pulses supplied to each electrode. At circuit activation, large currents are generated which discharge capacitances in the output side transistors causing rapid output side transistor turn on.
25 Citations
48 Claims
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1. A multiple output current stimulator circuit comprising:
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a reference voltage source to provide a reference voltage; a plurality of input side transistors; a plurality of output side transistors current mirror coupled to respective ones of the input side transistors, the output side transistors coupled together to provide a common sensing voltage, each one of the output side transistors having a current output terminal for providing a respective output current; a supply transistor switchably coupled in cascode arrangement between each input side transistor and a predetermined voltage port; a differential amplifier comprising;
a first input coupled to the reference voltage;
a second input coupled to the common sensing voltage; and
an output arranged to drive the supply transistor as a function of the difference between the reference voltage and the common sensing voltage; anda switching control circuit configured to selectively activate each one of the input side transistors so as to cause the corresponding current mirrored output side transistor to provide a respective output current in accordance with the corresponding input side transistor current. - View Dependent Claims (2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13)
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5. The stimulator circuit of 3 wherein the sum of the respective output currents is equal to the current delivered by the current source multiplied by a constant K, wherein the constant K equals the ratio of the first resistor to the second resistor.
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14. A multiple output current stimulator circuit comprising:
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a voltage reference source to provide a reference voltage; at least one input side transistor; at least one output side transistor current mirror coupled to the at least one input side transistor, the at least one output side transistor providing a common sensing voltage, the at least one output side transistor having a current output terminal for providing an output current; a supply transistor switchably coupled in cascode arrangement between the at least one input side transistor and a voltage port; a differential amplifier comprising;
a first input coupled to the reference voltage;
a second input coupled to the common sensing voltage; and
an output arranged to drive the supply transistor as a function of the difference between the reference voltage and the common sensing voltage; anda switching control circuit configured to activate the at least one input side transistor so as to cause the current mirrored at least one output side transistor to provide an output current in accordance with the corresponding at least one input side transistor current. - View Dependent Claims (15, 16)
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17. A peripherally-implantable neurostimulation system comprising:
a pulse generator comprising; a multiple output current stimulator circuit comprising; a current source; a first resistor coupled to the current source to provide a reference voltage; at least one output side transistor having a current output terminal for providing an output current; a second resistor coupled between a voltage source and the at least one output side transistor to thereby provide a common sensing voltage; and a differential amplifier comprising;
a first input coupled to the reference voltage;
a second input coupled to the common sensing voltage; and
an output arranged to drive the at least one output side transistor as a function of the difference between the reference voltage and the common sensing voltage.- View Dependent Claims (18, 19, 20, 21, 22, 23)
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24. A peripherally-implantable neurostimulation system comprising:
- a pulse generator configured to generate one or several electrical pulses, wherein the pulse generator comprises;
a current generator configured to generate a reference current; and a stimulator comprising a stimulator circuit, wherein the stimulator circuit amplifies the reference current according to a ratio of resistances of a first resistor and a second resistor; and one or more leads connected to the pulse generator, the one or more leads comprising one or more electrodes, wherein the one or more leads are configured to conduct the one or several electrical pulses from the pulse generator to the one or more electrodes. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 38)
- a pulse generator configured to generate one or several electrical pulses, wherein the pulse generator comprises;
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32. A peripherally-implantable neurostimulation system comprising:
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a pulse generator configured to generate one or several electrical pulses, the pulse generator comprising; a current generator configured to generate a reference current; and a stimulator comprising a stimulator circuit, wherein the stimulator circuit comprises a supply transistor having an output connected to one or several gates of one or several output transistors; and one or more leads connected to the pulse generator, the one or more leads comprising one or more electrodes, wherein the one or more leads are configured to conduct the one or several electrical pulses from the pulse generator to the one or more electrodes. - View Dependent Claims (33, 34, 40, 41, 42)
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35. A method of treating neuropathic pain comprising:
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implanting a pulse generator configured to generate one or several electrical pulses in a peripheral portion of a body, the pulse generator comprising a stimulator circuit, wherein the stimulator circuit amplifies a reference current according to ratio of resistances of a first resistor and a second resistor; implanting a lead within the peripheral portion of the body, wherein the lead comprises one or more electrodes; positioning the one or more electrodes of the lead proximate to a peripheral nerve; and connecting the lead to the pulse generator. - View Dependent Claims (36)
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37. A method of treating neuropathic pain comprising:
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implanting a pulse generator configured to generate one or several electrical pulses in a peripheral portion of a body, the pulse generator comprising a stimulator circuit, wherein the stimulator circuit comprises a supply transistor having an output connected to one or several gates of one or several output transistors; implanting a lead within the peripheral portion of the body, wherein the lead comprises one or more electrodes; positioning the one or more electrodes of the lead proximate to a peripheral nerve; and connecting the lead to the pulse generator.
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39. A peripherally-implantable neurostimulation system comprising:
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a pulse generator configured to generate one or several electrical pulses, the pulse generator comprising; a current generator; and a stimulator comprising a stimulator circuit, wherein the stimulator circuit has a turn on time of less than 5 us for an output current of less than 50 mA; and one or more leads connected to the pulse generator, the one or more leads comprising one or more electrodes, wherein the one or more leads conduct the one or several electrical pulses from the pulse generator to the one or more electrodes.
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43. A neurostimulation system, comprising:
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an implantable pulse generator comprising; a first resistance; a reference signal generator configured to generate a reference signal, the reference signal being at least one of a reference voltage or a reference current extending across or flowing through the first resistance; a second resistance; a plurality of electrode outputs; and a multi-output stimulator configured to amplify the reference signal to a total output signal, the total output signal being at least one of a total output voltage or a total output current extending across or flowing through the second resistance, the multi-output stimulator configured to distribute the total output signal to at least some of the plurality of electrode outputs; wherein a gain value of the amplification by the multi-output stimulator is based on the first resistance and the second resistance; and one or more leads comprising a plurality of electrodes configured to be coupled to the plurality of electrode outputs. - View Dependent Claims (44, 45, 46, 47, 48)
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Specification