EXECUTION CONTEXT SWAP BETWEEN HETEROGENOUS FUNCTIONAL HARDWARE UNITS

• US 20140281380A1
• Filed: 03/12/2013
• Published: 09/18/2014
• Est. Priority Date: 03/12/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sodhi, Inder M., Torrant, Marc, Offen, Zeev, Mishaeli, Michael, Choubal, Ashish V., Brandt, Jason W.
• Granted Patent: US 9,250,901 B2
• Time in Patent Office: Days
• US Class Current: 712/30
• CPC Class Codes: G06F 1/32 Means for saving power
• CPC Class Codes: G06F 1/3243 Power saving in microcontroller unit
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 9/30123 according to context, e.g. thread buffers
• CPC Class Codes: G06F 9/3836 Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
• CPC Class Codes: G06F 9/461 Saving or restoring of program or task context
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Remapping technologies for execution context swap between heterogeneous functional hardware units are described. A computing system includes multiple registers configured to store remote contexts of functional units. A mapping table maps the remote context to the functional units. An execution unit is configured to execute a remapping tool that intercepts an operation to access a remote context of a first functional unit of the plurality of functional units that is taken offline. The remapping tool determines that the first functional unit is remapped to a second functional unit using the mapping table. The operation is performed to access the remote context that is remapped to the second functional unit. The first functional unit and the second functional unit may be heterogeneous functional units.

Claims

1. A computing system comprising:

a plurality of registers configured to store remote contexts of a plurality of functional units of the computing system;

a mapping table that maps the remote contexts to the plurality of functional units; and

an execution unit configured to execute a remapping tool to;

intercept an operation to access a remote context of a first functional unit of the plurality of functional units that is taken offline;

determine that the first functional unit is remapped to a second functional unit of the plurality of functional units using the mapping table, wherein the first functional unit and the second functional unit are heterogeneous functional units, and

cause the operation to be performed to access the remote context that is remapped to the second functional unit.

2. The computing system of claim 1, wherein the remapping tool is configured to remap a functional unit identifier (FID) to a remapped FID when the first functional unit is remapped to the second functional unit, wherein the computing system further comprises:

an address decoder programmable logic array (PLA) configured to receive an address of the operation and at least one of the FID or remapped FID, wherein the address decoder PLA is configured to output a physical address for the remote context based on the at least one of the FID or the remapped FID; and

a physical address array for the plurality of registers, wherein the physical address array is configured to receive the physical address from the address decoder PLA and to return a first register value to a system fabric side band (SFSB) interface when the operation is a read operation, and wherein the physical address array is configured to receive the physical address from the address decoder PLA and a second register value from the SFSB interface when the operation is a write operation.

3. The computing system of claim 2, further comprising the SFSB interface configured to generate the address of the operation and the FID, wherein the remapping tool is configured to intercept the FID to determine whether the first functional unit is remapped to the second functional unit using the mapping table, wherein the remapping tool outputs the remapped FID to the address decoder PLA when the first functional unit is remapped to the second functional unit, and wherein the FID is output to the address decoder PLA when the first functional unit is not remapped to the second functional unit.

4. The computing system of claim 1, wherein the remapping tool is integrated into microcode executable by the execution unit.

5. The computing system of claim 1, further comprising at least one of a register file comprising the plurality of registers or a bank of register files comprising the plurality of registers.

6. The computing system of claim 1, wherein at least one of the plurality of functional units is at least one of a processor core, a thread executable by the processor core, or a graphics core.

7. The computing system of claim 1, wherein the plurality of functional units comprises at least two heterogeneous processor cores, and wherein the remapping tool is configured to present the remote contexts of the at least two heterogeneous processor cores to look the same to an operating system executing on the computing system.

8. The computing system of claim 7, wherein the remapping tool is configured to switch owner identifiers (IDs) of the remote contexts of the at least two heterogeneous processor cores without making a copy of the remote contexts of the at least two heterogeneous processor cores.

9. The computing system of claim 1, wherein the plurality of functional units comprises at least two heterogeneous processor cores, and wherein the remapping tool is configured to present a heterogeneous-replaced core of the at least two heterogeneous processor cores as being available to an operating system executing on the computing system when the heterogeneous-replaced core is taken offline.

10. The computing system of claim 9, wherein the mapping table comprises an entry that maps a first owner identifier of the heterogeneous-replaced core with a second owner identifier of a second heterogeneous core of the at least two heterogeneous processor cores that replaced the heterogeneous-replaced core.

11. The computing system of claim 1, wherein at least one of the remote contexts comprise residency timers used by an operating system executing on the computing system to determine which operating state to use.

12. The computing system of claim 1, wherein the remapping tool is configured to map the first functional unit to the second functional unit to allow software-agnostic context migration without making a copy of the remote context of the first functional unit.

13. A method comprising:

intercepting an operation to access a remote context of a first functional unit of a plurality of functional hardware units of a computing system, wherein the first functional unit is taken offline;

determining that the first functional unit is remapped to a second functional unit of the plurality of functional hardware units, wherein the first functional unit and the second functional unit are heterogeneous functional units; and

performing the operation to access the remote context that is remapped to the second functional unit.

14. The method of claim 13, wherein the operation comprises a functional unit identifier (FID), and wherein the determining comprises performing a lookup operation in a mapping table that maps remote contexts of functional units of the computing system to the functional units, and wherein the lookup operation returns a remapped FID for the second functional unit.

15. The method of claim 14, further comprising:

receiving at an address decoder programmable logic array (PLA) an address of the operation and at least one of the FID or remapped FID;

decoding the address of the operation by the address decoder (PLA); and

outputting from the address decoder PLA a physical address for the remote context based on at least one of the FID or the remapped FID.

16. The method of claim 15, wherein the intercepting further comprises intercepting the FID, and wherein the determining comprises:

determining whether the first functional unit is remapped to the second functional unit using the mapping table;

outputting the remapped FID to the address decoder PLA when the first functional unit is remapped to the second functional unit; and

outputting the FID to the address decoder PLA when the first functional unit is not remapped to the second functional unit.

17. The method of claim 13, wherein the plurality of functional units comprises at least two heterogeneous processor cores, and wherein the method further comprises presenting the remote contexts of the at least two heterogeneous processor cores to look the same to an operating system executing on the computing system.

18. The method of claim 13, wherein the plurality of functional units comprises at least two heterogeneous processor cores, and wherein the method further switching owner identifiers (IDs) of the remote contexts of the at least two heterogeneous processor cores without making a copy of the remote contexts of the at least two heterogeneous processor cores.

19. The method of claim 13, wherein the plurality of functional units comprises at least two heterogeneous processor cores, and wherein the method further comprises presenting a heterogeneous-replaced core of the at least two heterogeneous processor cores as being available to an operating system executing on the computing system when the heterogeneous-replaced core is taken offline.

20. The method of claim 19, further comprising mapping a first owner identifier of the heterogeneous-replaced core with a second owner identifier of a second heterogeneous core of the at least two heterogeneous processor cores that replaced the heterogeneous-replaced core.

21. The method of claim 13, further comprising remapping the remote context of the first functional unit to the second functional unit to allow software-agnostic context migration without making a copy of the remote context of the first functional unit.

22. A non-transitory, computer-readable storage medium including instructions that, when executed by a computing system, cause the computing system to perform operations comprising:

intercepting an operation to access a remote context of a first functional unit of a plurality of functional hardware units of a computing system, wherein the first functional unit is taken offline;

determining that the first functional unit is remapped to a second functional unit of the plurality of functional hardware units, wherein the first functional unit and the second functional unit are heterogeneous functional units; and

performing the operation to access the remote context that is remapped to the second functional unit.

23. The storage medium of claim 22, wherein the operation comprises a functional unit identifier (FID), and wherein the determining comprises performing a lookup operation in a mapping table that maps remote contexts of functional units of the computing system to the functional units, and wherein the lookup operation returns a remapped FID for the second functional unit.

24. A system comprising:

an integrated circuit die;

a peripheral device; and

a chipset coupled to the peripheral device and the integrated circuit die, wherein the integrated circuit die comprises;

a plurality of registers configured to store remote contexts of a plurality of functional hardware units;

a mapping table that maps the remote contexts to the plurality of functional units; and

an execution unit configured to execute a remapping tool to;

intercept an operation to access a remote context of a first functional unit of the plurality of functional units that is taken offline;

determine that the first functional unit is remapped to a second functional unit of the plurality of functional units using the mapping table, wherein the first functional unit and the second functional unit are heterogeneous functional units; and

cause the operation to be performed to access the remote context that is remapped to the second functional unit.

25. The system of claim 24, further comprising a non-volatile memory device coupled to the integrated circuit die.