TESTING APPARATUS FOR PROVIDING PER PIN LEVEL SETTING
First Claim
Patent Images
1. A testing apparatus for providing per pin level setting, the testing apparatus comprising:
- a control unit comprising a field programmable gate array (FPGA) for providing a pulse width modulation (PWM) signal; and
a filter circuit electrically connected to the control unit for receiving the PWM signal and outputting at least one direct current (DC) voltage.
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Abstract
A testing apparatus for providing per pin level setting is disclosed, and the testing apparatus includes a control unit and a filter circuit, where the control unit is electrically connected to the filter circuit. The control unit includes a field programmable gate array (FPGA) for providing a PWM signal. The filter circuit receives the PWM signal and outputs at least one DC voltage.
18 Citations
6 Claims
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1. A testing apparatus for providing per pin level setting, the testing apparatus comprising:
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a control unit comprising a field programmable gate array (FPGA) for providing a pulse width modulation (PWM) signal; and a filter circuit electrically connected to the control unit for receiving the PWM signal and outputting at least one direct current (DC) voltage. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification