ANALOG/DIGITAL CONVERTER AND METHOD FOR CONVERTING ANALOG SIGNALS TO DIGITAL SIGNALS

• US 20140300500A1
• Filed: 09/06/2012
• Published: 10/09/2014
• Est. Priority Date: 09/22/2011
• Status: Active Grant

• Current Assignee: Japan Science And Technology Agency
• Original Assignee: Japan Science And Technology Agency
• Inventors: San, Hao, Maruyama, Tsubasa, Hotta, Masao
• Granted Patent: US 8,994,572 B2
• Time in Patent Office: Days
• US Class Current: 341/141
• CPC Class Codes: H03M 1/0609 at two points of the transfer characteristic, i.e. by adjusting two reference values, e.g. offset and gain error
• CPC Class Codes: H03M 1/0692 using a diminished radix representation, e.g. radix 1.95
• CPC Class Codes: H03M 1/0695 using less than the maximum number of output states per stage or step, e.g. 1.5 per stage or less than 1.5 bit per stage type
• CPC Class Codes: H03M 1/1014 at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error gain setting for range control H03M1/18
• CPC Class Codes: H03M 1/1205 Multiplexed conversion systems
• CPC Class Codes: H03M 1/14 Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
• CPC Class Codes: H03M 1/40 recirculation type
• CPC Class Codes: H03M 1/403 using switched capacitors
• CPC Class Codes: H03M 1/442 using switched capacitors

Abstract

The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing. An A/D converter (1) of the invention, which is a cyclic type of analog/digital converter for converting an analog input signal to a digital signal having a predetermined resolution, comprises: a digital approximation unit (10) that includes a comparing unit (13) for comparing the magnitude of an input first analog signal with a threshold value to output a digital value indicating a result of the comparison and that also includes an MDAC unit (14) for amplifying the first analog signal to β-fold, where β is greater than one but smaller than two, and for executing a predetermined computation in accordance with the result of the comparison of the comparing unit to output a second analog signal; a multiplexer (20) that, if the MSB is to be computed, outputs the analog input signal and, otherwise, outputs the second analog signal as the first analog signal; a β estimating unit (30) that estimates the value of β; and a digital signal outputting unit (40) that sequentially takes in digital values outputted by the comparing unit and that outputs the taken-in digital values as the digital signal.

Claims

1. A cyclic-type analog-digital converter for converting an analog input signal that is input into a digital signal having a predetermined resolution, the analog-digital converter comprising:

a digital approximator including a comparator configured to compare the magnitude of a first analog signal that is input and a threshold value and to output a digital value indicative of the comparison result and a multiplying digital-analog converter configured to amplify the first analog signal by a factor of β and

at the same time, to perform a predetermined calculation in accordance with the comparison result of the comparator to output a second analog signal;

a multiplexer configured to output an analog input signal as the first analog signal when calculating the most significant bit and to output the second analog signal as the first analog signal when calculating a bit other than the most significant bit;

a β

estimator configured to estimate the value of β

; and

a digital signal output unit configured to sequentially take in the digital value output from the comparator and to output the digital value as a digital signal based on an estimated value of β

, wherein

the value of β

is a value larger than 1 and smaller than 2.

3. The analog-digital converter according to claim 1, wherein

the β

estimator estimates the value of β

using two β

-adic digital signals having a predetermined number of bits and acquired by converting the same input signal, and

the predetermined number of bits of a plurality of β

-adic digital signals used when the value of β

is estimated is specified so that the resolution in the case where the value of β

is the value in the worst-case design is substantially equal to the predetermined resolution.

4. The analog-digital converter according to claim 1, wherein

the number of bits of the digital signal is determined so that the resolution with the estimated value of β

is substantially equal to the predetermined resolution.

5. The analog-digital converter according to claim 1, wherein

the digital signal output unit outputs the digital signal as a binary digital signal using the estimated value of β

.

6. The analog-digital converter according to claim 1, wherein

the β

estimator estimates the value of β

by converting an estimation input DC signal that can be converted into two digital signals into two digital signals, i.e., a first estimation β

-adic digital signal whose most significant bit is 1 and a second estimation β

-adic digital signal whose most significant bit is 0 and by minimizing a difference between the first estimation β

-adic digital signal and the second estimation β

-adic digital signal.

7. The analog-digital converter according to claim 1, wherein

the β

estimator estimates the value of β

using a lookup table that specifies values related to powers of β

corresponding to a plurality of values of the β and

a plurality of exponents of the values of β

for each value of β

.

8. The analog-digital converter according to claim 7, wherein

the maximum value of the exponents of the values of β

specified in the lookup table is specified so that the resolution in the case where the value of β

is the value in the worst-case design is substantially equal to the predetermined resolution.

9. The analog-digital converter according to claim 1, wherein

the predetermined calculation is performed by adding the value of β

from which 1 is subtracted multiplied by a first reference signal to the value of the first analog signal multiplied by β

in the case where the magnitude of the first analog signal is smaller than a threshold value, or by adding the value of β

from which 1 is subtracted multiplied by a second reference signal to the value of the first analog signal multiplied by β

in the case where the magnitude of the first analog signal is greater than a threshold value.

10. The analog-digital converter according to claim 9, wherein

the multiplying digital-analog converter has two capacitor having different capacitance values and an operational amplifier connected to the capacitors via a switch.

11. The analog-digital converter according to claim 1, wherein

the value of β

in the worst-case design is less than 2 and the value of β

in the worst-case design is a value close to 2.

2. A pipeline-type analog-digital converter for converting an analog input signal that is input to an input terminal into a digital signal having a predetermined resolution, the analog-digital converter comprising:

a plurality of digital approximators including a comparator configured to compare the magnitude of a first analog signal that is input and a threshold value and to output a digital value indicative of the comparison result and a multiplying digital-analog converter configured to amplify the first analog signal by a factor of β and

at the same time, to perform a predetermined calculation in accordance with the comparison result of the comparator to output a second analog signal, the plurality of digital approximators being connected in series to the input terminal and the second analog signal of the digital approximator in the previous stage being provided to the digital approximator in the subsequent stage as the first analog signal;

a β

estimator configured to estimate the values of β

of the plurality of digital approximators; and

a digital signal output unit configured to sequentially take in the digital value output from the comparator and to output the digital value as a digital signal based on an estimated value of β

, wherein

the value of β

is a value larger than 1 and smaller than 2.

12. The analog-digital converter according to claim 2, wherein

the β

estimator estimates the value of β

using two β

-adic digital signals having a predetermined number of bits and acquired by converting the same input signal, and

the number of the plurality of digital approximators is specified so that the resolution in the case where the value of β

is the value in the worst-case design is substantially equal to the predetermined resolution.

13. The analog-digital converter according to claim 2, wherein

the β

estimator estimates the values of β

of several digital approximators that calculate the higher-order bits of the digital signal but does not estimate the values of β

of the other digital approximators.

14. A method for estimating a value of an amplification degree of β

of an analog-digital converter comprising a multiplying digital-analog converter whose amplification degree is β and

having a predetermined resolution, the method comprising the steps of;

inputting the same estimation input DC signal to the analog-digital converter;

converting the input signal into two β

-adic digital signals; and

estimating the value of the amplification degree of β

based on a plurality of converted β

-adic digital signals, wherein

the value of β

is a value larger than 1 and smaller than 2, and

the number of bits of the plurality of converted β

-adic digital signals is specified so that the resolution in the case where the value of β

is the value in the worst-case design is substantially equal to the predetermined resolution.

15. The method according to claim 14, wherein

the analog-digital converter further has a lookup table that specifies values related to powers of the β

corresponding to a plurality of values of the β and

a plurality of exponents of the values of β

for each value of β

, and

the maximum value of the exponents specified in the lookup table is specified so that the resolution in the case where the value of β

is the value in the worst-case design is substantially equal to the predetermined resolution.

16. The method according to claim 14, wherein

the analog-digital converter is a pipeline-type converter in which a plurality of digital approximators are connected in series to an input terminal, and

the number of digital approximators is specified so that the resolution in the case where the value of β

is the value in the worst-case design is substantially equal to the predetermined resolution.