Driver Circuit for Electroluminescent Element

• US 20140312801A1
• Filed: 04/23/2013
• Published: 10/23/2014
• Est. Priority Date: 04/19/2013
• Status: Active Grant

• Current Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Original Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Inventors: Kuo, Ping-Sheng
• Granted Patent: US 8,896,224 B2
• Time in Patent Office: Days
• US Class Current: 315/291
• CPC Class Codes: H05B 44/00 Circuit arrangements for operating electroluminescent light sources for operating light emitting diodes H05B45/00
• CPC Class Codes: H05B 45/60 Circuit arrangements for operating LEDs comprising organic material, e.g. for operating organic light-emitting diodes [OLED] or polymer light-emitting diodes [PLED]
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A driver circuit for an EL element is proposed. The driver circuit for the EL element includes a first TFT, a second TFT, a third TFT, a storage capacitor, and an EL element. The EL element includes an anode connected to a first supply voltage and a cathode connected to a source of the first TFT. A source of the second TFT is connected to a drain of the first TFT. A source of the third TFT is connected to a drain of the second TFT. A drain of the third TFT is connected to the ground. Brightness of the EL element can be prevented from being lowered due to EL element degradation by adopting the method of such connections.

Claims

1. A driver circuit for an electroluminescent (EL) element, comprising:

a first thin-film transistor (TFT);

a second TFT, comprising a source connected to a drain of the first TFT;

a third TFT, comprising a source connected to a drain of the second TFT and a drain connected to ground;

an EL element, comprising an anode and a cathode, the anode connected to a first supply voltage, and the cathode connected to a source of the first TFT;

a storage capacitor, comprising a first terminal and a second terminal, the first terminal connected to a gate of the second TFT, and the second terminal connected to the drain of the second TFT;

a fourth TFT, comprising a source connected to a second supply voltage and a drain connected to the source of the second TFT;

a fifth TFT comprising a source connected to the drain of the fourth TFT and a drain connected to the gate of the second TFT; and

a sixth TFT, comprising a source connected to the drain of the second TFT and a drain connected to a data signal;

wherein a duty cycle of the driver circuit for the EL element comprises a sampling phase and a holding phase, the first TFT, the second TFT, and the third TFT are conducted at the holding phase, an impedance of the first TFT, the second TFT, and the third TFT in cascode is greater than an impedance of the EL element, wherein the fourth transistor, the fifth transistor, and the sixth transistor are cut-off in the holding phase, wherein the second transistor, the fourth transistor, the fifth transistor, and the sixth transistor are conducted at the sampling phase, while the first transistor and the third transistor are cut-off at the sampling phase, wherein the storage capacitor is used fir storing an electric signal across the gate of the second TFT and the drain of the second TFT at the sampling stage and for holding a voltage which is between the gate of the second TFT and the drain of the second TFT and varies with the electric signal at the holding phase for controlling brightness of the EL element.

2. The driver circuit for the EL element as claimed in claim 1, wherein gates of the fourth TFT, the fifth TFT, and the sixth TFT are all connected to a first gate signal, gates of the first TFT and the third TFT are both connected to a second gate signal, which is the reversed-phase first gate signal, and the first gate signal and the second gate signal are used for controlling the fourth TFT, the fifth TFT, and the sixth TFT to be cut-off at the holding phase and for controlling the first TFT, the second TFT, and the third TFT to be conducted at the holding phase.

3. A driver circuit for an electroluminescent (EL) element, comprising:

a first thin-film transistor (TFT);

a second TFT, comprising a source connected to a drain of the first TFT;

a third TFT, comprising a source connected to a drain of the second TFT and a drain connected to ground;

an EL element, comprising an anode and a cathode, the anode connected to a first supply voltage, and the cathode connected to a source of the first TFT; and

a storage capacitor, comprising a first terminal and a second terminal, the first terminal connected to a gate of the second TFT, and the second terminal connected to the drain of the second TFT;

wherein a duty cycle of the driver circuit for the EL element comprises a sampling phase and a holding phase, the first TFT, the second TFT, and the third TFT are conducted at the holding phase, and the storage capacitor is used for storing an electric signal between the gate of the second TFT and the drain of the second TFT at the sampling stage and for holding a voltage which is between the gate of the second TFT and the drain of the second TFT and varies with the electric signal at the holding phase for controlling brightness of the EL element.

4. The driver circuit for the EL element as claimed in claim 3, further comprising:

a fourth TFT, comprising a source connected to a second supply voltage and a drain connected to the source of the second TFT;

a fifth TFT, comprising a source connected to the drain of the fourth TFT and a drain connected to the gate of the second TFT; and

a sixth TFT, comprising a source connected to the drain of the second TFT and a drain connected to a data signal;

wherein the second TFT, the fourth TFT, the fifth TFT, and the sixth TFT are conducted at the sampling phase, and the first TFT and the third TFT are cut-off at the holding phase.

5. The driver circuit for the EL element as claimed in claim 4, wherein gates of the fourth TFT, the fifth TFT, and the sixth TFT are all connected to a first gate signal, gates of the first TFT and the third TFT are both connected to a second gate signal, which is the reversed-phase first gate signal, and the first gate signal and the second gate signal are used for controlling the fourth TFT, the fifth TFT, and the sixth TFT to be cut-off at the holding phase and for controlling the first TFT, the second TFT, and the third TFT to be conducted at the holding phase.

6. The driver circuit for the EL element as claimed in claim 5, wherein an voltage level of the first gate signal at the sampling phase is reverse to an voltage level of the first gate signal at the holding phase, and the first gate signal and the second gate signal are also used for controlling the first TFT and the third TFT to be cut-off at the sampling phase and for controlling the second TFT, the fourth TFT, the fifth TFT, and the sixth TFT to be conducted at the sampling phase.

7. The driver circuit for the EL element as claimed in claim 6, wherein the first TFT, the second TFT, the third TFT, the fourth TFT, the fifth TFT, and the sixth TFT are all N-type IGZO (indium gallium zinc oxide) TFTs, and the first gate signal is at a high voltage level at the sampling phase and at a low voltage level at the holding phase.

8. The driver circuit for the EL element as claimed in claim 7, wherein duration at the holding phase is longer than duration at the sampling phase when the driver circuit for the EL element is during a duty cycle.

9. The driver circuit for the EL element as claimed in claim 8, wherein the EL element is an organic El element.

10. The driver circuit for the EL element as claimed in claim 9, wherein the first TFT, the second TFT, the third TFT, the fourth TFT, the fifth and the sixth TFT are all N-type IGZO TFTs.

11. The driver circuit for the EL element as claimed in claim 10, wherein the sixth TFT is a current source at the sampling phase equivalently.

12. The driver circuit for the EL element as claimed in claim 11, wherein a current flowing through the current source is determined by both of the data signal and the first gate signal.