MODULE CIRCUIT, DISPLAY MODULE AND METHOD FOR PROVIDING AN OUTPUT SIGNAL

• US 20140313175A1
• Filed: 11/07/2012
• Published: 10/23/2014
• Est. Priority Date: 11/29/2011
• Status: Active Grant

• Current Assignee: ams AG (Ams-Osram AG)
• Original Assignee: ams AG (Ams-Osram AG)
• Inventors: Trattler, Peter
• Granted Patent: US 10,360,874 B2
• Time in Patent Office: Days
• US Class Current: 345/207
• CPC Class Codes: G09G 2320/064 by time modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2360/144 the light being ambient light
• CPC Class Codes: G09G 3/3406 Control of illumination source illumination devices structurally associated with liquid crystal cells G02F1/1336
• CPC Class Codes: G09G 5/10 Intensity circuits

Abstract

A module circuit (11) comprises a sensor terminal (43) for feeding a sensor signal (SP) and a clock terminal (41) for feeding a pulse width-modulated clock signal (ST) having a first and a second clock phase (A, B). A signal processing circuit (40) of the module circuit (11) is coupled on the input side to the sensor terminal (43) and the clock terminal (41) and is designed to provide an output signal (SAL) dependent on the sensor signal (SP) that can be tapped in the first clock phase (A) and independent of the sensor signal (SP) that can be tapped in the second clock phase (B).

Claims

1. Module circuit, comprising

a sensor terminal (43) for feeding a sensor signal (SP),

a clock terminal (41) for feeding a pulse width-modulated clock signal (ST) having a first and a second clock phase (A, B) and

a signal processing circuit (40), which is coupled on the input side to the sensor terminal (43) and the clock terminal (41) and is designed to provide an output signal (SAL) dependent on the sensor signal (SP) that can be tapped in the first clock phase (A) and independent of the sensor signal (SP) that can be tapped in the second clock phase (B), and is designed to generate the output signal (SAL) by integrating the sensor signal (SP) in the first clock phase (A) of the clock signal (ST).

2. Module circuit according to claim 1,

in which the signal processing circuit (40) is designed to hold the output signal (SAL) in the second clock phase (B) of the clock signal (ST) constant at the value of the output signal (SAL) at the end of the first clock phase (A) of the clock signal (ST).

3. Module circuit according to claim 1 or 2,

in which the signal processing circuit (40) is designed to determine the output signal (SAL) on the basis of a trigger signal (SDI) for a display (17).

4. Module circuit according to one of claims 1 to 3,

in which the signal processing circuit (40) is designed to determine the output signal (SAL) on the basis of the number of activated pixels and the total number of pixels of a display (17).

5. Module circuit according to one of claims 1 to 4,

comprising an ambient light sensor (13) that is coupled to the sensor terminal (43) and at which the sensor signal (SP) can be tapped.

6. Module circuit according to one of claims 1 to 5,

the signal processing circuit (40) comprising an evaluation circuit (44) and an analog-digital converter (42), which connects the sensor terminal (43) to the evaluation circuit (44).

7. Module circuit according to claim 6,

in which the analog-digital converter (42) is coupled on the input side to the clock terminal (41) and is designed to integrate the sensor signal (SP) in an integration time period that is exclusively inside the first clock phase (A).

8. Module circuit according to one of claims 1 to 7,

comprising a driver circuit (46) to which a light source (16) can be coupled and which is coupled to the clock terminal (41) and is designed to switch off the coupling-capable light source (16) in the first clock phase (A) of the clock signal (ST) and to switch it on in the second clock phase (B) of the clock signal (ST).

9. Module circuit according to claim 8,

in which the driver circuit (46) is coupled on the input side to the signal processing circuit (40) and is designed to adjust a brightness of the coupling-capable light source (16) on the basis of the output signal (SAL).

10. Module circuit according to one of claims 1 to 9,

comprising a proximity sensor (30) coupled to the signal processing circuit (40), wherein the signal processing circuit (40) is designed such that the proximity sensor (30) is operated in the first clock phase (A).

11. Display module, comprising

a module circuit (12),

a display (17) and

a light source (16), which is arranged as back-lighting for the display (17),

wherein the module circuit (12) comprises:

a sensor terminal (43) for feeding a sensor signal (SP),

a clock terminal (41) for feeding a pulse width-modulated clock signal (ST) having a first and a second clock phase (A, B) and

a signal processing circuit (40), which is coupled on the input side to the sensor terminal (43) and the clock terminal (41) and is designed to provide an output signal (SAL) dependent on the sensor signal (SP) that can be tapped in the first clock phase (A) and independent of the sensor signal (SP) that can be tapped in the second clock phase (B), and is designed to generate the output signal (SAL) by integrating the sensor signal (SP) in the first clock phase (A) of the clock signal (ST).

12. Display module according to claim 11,

in which the light source (16) is coupled to the sensor terminal (43) and the sensor signal (SP) can be tapped at the light source (16).

13. Display module according to claim 11,

comprising an ambient light sensor (13), wherein the display module (11) is free of a light-impermeable barrier (21) between the ambient light sensor (13) and the display (17).

14. Display module according to claim 11 or 13,

comprising an ambient light sensor (13), which is arranged such that it obtains light through the display (17).

15. Method for providing an output signal, comprising:

feeding a sensor signal (SP),

feeding a pulse width-modulated clock signal (ST) with a first and a second clock phase (A, B) and

providing the output signal (SAL) dependent on the sensor signal (SP) that can be tapped in the first clock phase (A) and independent of the sensor signal (SP) that can be tapped in the second clock phase (B), wherein the output signal (SAL) is generated by integrating the sensor signal (SP) in the first clock phase (A) of the clock signal (ST).