METHODS OF FORMING ISOLATION REGIONS FOR BULK FINFET SEMICONDUCTOR DEVICES
First Claim
Patent Images
1. A method of forming a FinFET device, comprising:
- forming a plurality of fin-formation trenches in a semiconductor substrate, said fin-formation trenches defining a plurality of spaced-apart fins;
forming a patterned liner layer that covers a portion of said substrate positioned between said plurality of fins while exposing portions of said substrate positioned laterally outside of said patterned liner layer; and
performing at least one etching process on said exposed portions of said substrate through said patterned liner layer to define an isolation trench in said substrate, wherein said isolation trench has a depth that is greater than a depth of said fin-formation trenches.
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Abstract
One method disclosed herein includes forming a plurality of fin-formation trenches in a semiconductor substrate that define a plurality of spaced-apart fins, forming a patterned liner layer that covers a portion of the substrate positioned between the fins while exposing portions of the substrate positioned laterally outside of the patterned liner layer, and performing at least one etching process on the exposed portions of the substrate through the patterned liner layer to define an isolation trench in the substrate, wherein the isolation trench has a depth that is greater than a depth of the fin-formation trenches.
143 Citations
31 Claims
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1. A method of forming a FinFET device, comprising:
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forming a plurality of fin-formation trenches in a semiconductor substrate, said fin-formation trenches defining a plurality of spaced-apart fins; forming a patterned liner layer that covers a portion of said substrate positioned between said plurality of fins while exposing portions of said substrate positioned laterally outside of said patterned liner layer; and performing at least one etching process on said exposed portions of said substrate through said patterned liner layer to define an isolation trench in said substrate, wherein said isolation trench has a depth that is greater than a depth of said fin-formation trenches. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of forming a FinFET device, comprising:
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forming a plurality of fin-formation trenches in a semiconductor substrate, said fin-formation trenches defining a plurality of spaced-apart fins; forming a patterned liner layer that covers a portion of said substrate positioned between said plurality of fins while exposing portions of said substrate positioned laterally outside of said patterned liner layer, wherein said patterned liner layer is comprised of a generally U-shaped liner portion positioned between said plurality of spaced-apart fins that covers said portion of said substrate; performing at least one etching process on said exposed portions of said substrate through said patterned liner layer to define an isolation trench in said substrate, wherein said isolation trench has a depth that is greater than a depth of said fin-formation trenches; after forming said isolation trench, forming a layer of insulating material above said patterned liner layer so as to over-fill said isolation trench; and performing at least one process operation to recess an upper surface of said layer of insulating material to a desired level, wherein recessing said layer of insulating material results in the definition of a deep isolation region positioned in said isolation trench and a shallow isolation region positioned above a portion of said generally U-shaped liner portion. - View Dependent Claims (14, 15, 16)
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17. A method of forming a FinFET device, comprising:
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forming a plurality of fin-formation trenches in a semiconductor substrate, said fin-formation trenches defining a plurality of spaced-apart fins; forming a patterned liner layer that covers a portion of said substrate positioned between said plurality of fins while exposing portions of said substrate positioned laterally outside of said patterned liner layer, wherein said patterned liner layer is comprised of a generally U-shaped liner portion positioned between said plurality of spaced-apart fins that covers said portion of said substrate; performing at least one etching process on said exposed portions of said substrate through said patterned liner layer to define an isolation trench in said substrate, wherein said isolation trench has a depth that is greater than a depth of said fin-formation trenches; after forming said isolation trench, removing said patterned liner layer; after removing said patterned liner layer, forming a layer of insulating material that over-fills said isolation trench and said plurality of fin-forming trenches; and performing at least one process operation to recess an upper surface of said layer of insulating material to a desired level, wherein recessing said layer of insulating material results in the definition of a deep isolation region positioned in said isolation trench and a shallow isolation region positioned between said plurality of fins. - View Dependent Claims (18, 19)
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20. A method of forming first and second isolation structures having first and second final depths, respectively, in a semiconductor substrate, said second final depth being greater than said first final depth, the method comprising:
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forming first and second trenches in said substrate around first and second active regions, respectively, said first and second trenches having a common depth; forming a patterned liner layer in said first and second trenches that covers a bottom surface of said first trench and exposes at least a portion of a bottom surface of said second trench; and performing at least one etching process through said patterned liner layer on said exposed portion of said bottom surface of said second trench to define a third trench having a depth that is greater than said common depth and corresponds to said final depth of said second isolation structure. - View Dependent Claims (21, 22, 23, 24, 25)
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26. A method of forming first and second isolation structures having first and second final depths, respectively, in a semiconductor substrate, said second final depth being greater than said first final depth, the method comprising:
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forming first and second trenches in said substrate around first and second active regions, respectively, said first and second trenches having a common depth that corresponds to said final depth of said first isolation structure; forming a patterned liner layer in said first and second trenches that covers a bottom surface of said first trench and exposes at least a portion of a bottom surface of said second trench; performing at least one etching process through said patterned liner layer on said exposed portion of said bottom surface of said second trench to define a third trench having a depth that corresponds to said final depth of said second isolation structure; removing said patterned liner layer; after removing said patterned liner layer, forming a layer of insulating material that over-fills said first, second and third trenches; and performing at least one process operation to remove excess amounts of said layer of insulating material so as to thereby define said first and second isolation regions.
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27. A method of forming first and second isolation structures having first and second final depths, respectively, in a semiconductor substrate, said second final depth being greater than said first final depth, the method comprising:
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forming first and second trenches in said substrate around first and second active regions, respectively, said first and second trenches having a common depth; forming a patterned liner layer in said first and second trenches that covers a bottom surface of said first trench and exposes at least a portion of a bottom surface of said second trench; performing at least one etching process through said patterned liner layer on said exposed portion of said bottom surface of said second trench to define a third trench having a depth that corresponds to said final depth of said second isolation structure; forming a layer of insulating material above said patterned liner layer, said layer of insulating material over-filling portions of said first, second and third trenches not occupied by said patterned liner layer; and performing at least one process operation to remove excess amounts of said layer of insulating material so as to thereby define said first and second isolation regions. - View Dependent Claims (28, 29, 30, 31)
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Specification