TRENCH PATTERNING WITH BLOCK FIRST SIDEWALL IMAGE TRANSFER

• US 20140315380A1
• Filed: 04/19/2013
• Published: 10/23/2014
• Est. Priority Date: 04/19/2013
• Status: Active Grant

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Kanakasabapathy, Sivananda K., Tseng, Chiahsun, Xu, Yongan, Yin, Yunpeng
• Granted Patent: US 9,064,813 B2
• Time in Patent Office: Days
• US Class Current: 438/618
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/3081 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/3083 characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76816 Aspects relating to the layout of the pattern or to the size of vias or trenches layout of the interconnections per se H01L23/528; CAD of ICs G06F30/00
• CPC Class Codes: H01L 2223/54426 for alignment
• CPC Class Codes: H01L 2223/5446 Located in scribe lines
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method including forming a tetra-layer hardmask above a substrate, the tetra-layer hardmask including a second hardmask layer above a first hardmask layer; removing a portion of the second hardmask layer of the tetra-layer hardmask within a pattern region of a structure comprising the substrate and the tetra-layer hardmask; forming a set of sidewall spacers above the tetra-layer hardmask to define a device pattern; and transferring a portion of the device pattern into the substrate and within the pattern region of the structure.

Claims

1. A method comprising:

forming a tetra-layer hardmask above a substrate, the tetra-layer hardmask comprising a second hardmask layer above a first hardmask layer;

removing a portion of the second hardmask layer of the tetra-layer hardmask within a pattern region of a structure comprising the substrate and the tetra-layer hardmask;

forming a set of sidewall spacers above the tetra-layer hardmask to define a device pattern; and

transferring a portion of the device pattern into the substrate and within the pattern region of the structure.

2. The method of claim 1, wherein removing the portion of the second hardmask layer of the tetra-layer hardmask within the pattern region of the structure comprises:

depositing a block anti-reflective coating (ARC) layer and a block planarization layer above the tetra-layer hardmask;

forming a block pattern from a photo-resist material on top of the block ARC layer;

transferring the block pattern into the second hardmask layer to define the pattern region; and

removing the block ARC layer and the block planarization layer.

3. The method of claim 1, wherein forming the set of sidewall spacers above the tetra-layer hardmask to define the device pattern comprises:

creating a mandrel, lithographically, from a photo-resist material;

depositing a conformal layer of dielectric material covering the mandrel;

performing a directional etch of the conformal layer of dielectric material to form the set of sidewall spacers; and

removing the mandrel.

4. The method of claim 1, wherein transferring a portion of the device pattern into the substrate within the pattern region of the structure comprises:

transferring a portion of the device pattern to the first hardmask layer within the pattern region of the structure; and

transferring the device pattern from the first hardmask layer to the substrate within the pattern region of the structure.

5. The method of claim 4, wherein transferring the portion of the device pattern to the first hardmask layer within the pattern region of the structure comprises:

transferring the portion of the device pattern to a mandrel planarization layer above the tetra-layer hardmask; and

transferring the portion of the device pattern from the mandrel planarization layer to the first hardmask layer.

6. The method of claim 1, wherein forming the tetra-layer hardmask above the substrate comprises:

forming a first patterning layer above the dielectric layer;

forming the first hardmask layer above the first patterning layer;

forming a second patterning layer above the first hardmask layer; and

forming the second hardmask layer above the second patterning layer.

7. The method of claim 1, further comprising:

depositing a metal within the device pattern transferred into the substrate.

8. A method comprising:

forming a tetra-layer hardmask comprising a second hardmask layer above a first hardmask layer;

defining a pattern region in the second hardmask layer;

forming a device pattern above the tetra-layer hardmask; and

transferring the device pattern to a substrate below the tetra-layer hardmask, wherein the device pattern is transferred to the substrate only in the pattern region defined by the second hardmask layer.

9. The method of claim 8, wherein defining the pattern region is accomplished using a lithographic masking and etching technique.

10. The method of claim 8, wherein defining the pattern region in the second hardmask layer comprises:

depositing a block anti-reflective coating (ARC) layer and a block planarization layer above the tetra-layer hardmask;

depositing a photo-resist material above the block ARC layer;

forming a block pattern, lithographically, in the photo-resist material;

transferring the block pattern into the second hardmask layer; and

removing the block ARC layer and the block planarization layer after transferring the block pattern into the second hardmask layer.

11. The method of claim 8, wherein forming a device pattern above the tetra-layer hardmask comprises:

creating a mandrel, lithographically, from a photo-resist material;

depositing a conformal layer of dielectric material covering the mandrel;

performing a directional etch of the conformal layer of dielectric material to form a set of sidewall spacers; and

removing the mandrel.

12. The method of claim 8, wherein forming the device pattern above the tetra-layer hardmask comprises:

forming a first device pattern intended to fabricated an interconnect structure; and

forming a second device pattern intended to fabricate an alignment mark.

13. The method of claim 8, wherein transferring the device pattern is accomplished using a sidewall image transfer technique.

14. The method of claim 8, wherein transferring the device pattern to a substrate below the tetra-layer hardmask comprises:

transferring the device pattern to a mandrel ARC layer above a mandrel planarization layer above the tetra-layer hardmask; and

transferring the device pattern from the mandrel ARC layer to the mandrel planarization layer;

transferring the device pattern from the mandrel planarization layer to the first hardmask layer; and

transferring the device pattern from the first hardmask layer to the substrate.

15. The method of claim 8, wherein forming the tetra-layer hardmask comprises:

forming a first patterning layer;

forming the first hardmask layer above the first patterning layer;

forming a second patterning layer above the first hardmask layer; and

forming the second hardmask layer above the second patterning layer.

16. A method comprising:

forming a tetra-layer hardmask above a substrate, the tetra-layer hardmask comprising a first patterning layer, a first hardmask layer, a second patterning layer, and a second hardmask layer all of which are formed one top of one another and in sequence;

forming a block pattern from a photo-resist material above the tetra-layer hardmask;

transferring the block pattern from the photo-resist material to the second hardmask layer, wherein the block pattern in the second hardmask layer defines a pattern region;

forming a device pattern using a set of sidewall spacers above the second hardmask layer;

transferring the device pattern into the first hardmask layer, only within the pattern region; and

transferring the device pattern into the substrate, only within the pattern region.

17. The method of claim 16, wherein transferring the block pattern from the photo-resist layer above the tetra-layer hardmask to the second hardmask layer comprises:

depositing a block anti-reflective coating (ARC) layer above a block planarization layer above the tetra-layer hardmask;

depositing the photo-resist layer above the block ARC layer;

forming the block pattern, lithographically, in the photo-resist; and

removing the block ARC layer and the block planarization layer after transferring the block pattern into the second hardmask layer.

18. The method of claim 16, wherein forming the device pattern using the set of sidewall spacers above the second hardmask layer comprises:

creating a mandrel, lithographically, from a photo-resist layer;

depositing a conformal layer of dielectric material covering the mandrel;

performing a directional etch of the conformal layer of dielectric material to form the set of sidewall spacers; and

removing the mandrel.

19. The method of claim 16, wherein forming the device pattern using the set of sidewall spacers above the second hardmask layer comprises:

forming a first device pattern intended to fabricated an interconnect structure; and

forming a second device pattern intended to fabricate an alignment mark.

20. The method of claim 16, wherein transferring the device pattern into the first hardmask layer comprises:

transferring the device pattern to a mandrel ARC layer above a mandrel planarization layer above the tetra-layer hardmask; and

transferring the device pattern from the mandrel ARC layer to the mandrel planarization layer; and

transferring the device pattern from the mandrel planarization layer to the first hardmask layer.