THIN-FILM TRANSISTOR STRUCTURE, AS WELL AS THIN-FILM TRANSISTOR AND DISPLAY DEVICE EACH HAVING SAID STRUCTURE

• US 20140319512A1
• Filed: 04/19/2012
• Published: 10/30/2014
• Est. Priority Date: 04/22/2011
• Status: Active Grant

• Current Assignee: Klaus Schmidt, Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Klaus Schmidt
• Inventors: Maeda, Takeaki, Kugimiya, Toshihiro, Lee, Je Hun, Ahn, Byung Du, Kim, Gun Hee, Song, Jun Ho
• Granted Patent: US 9,093,542 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

There is provided an oxide semiconductor layer capable of making stable the electric characteristics of a thin-film transistor without requiring an oxidatively-treated layer when depositing a passivation layer or the like in display devices such as organic EL displays and liquid crystal displays. The thin-film transistor structure of the present invention at least having, on a substrate, an oxide semiconductor layer, a source-drain electrode, and a passivation layer in order from the substrate side, wherein the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer; the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on the source-drain electrode and passivation layer side; the second oxide semiconductor layer contains Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate side; and the first oxide semiconductor layer is in direct contact both with the source-drain electrode and with the passivation layer.

Claims

1. A thin-film transistor structure comprising a substrate, an oxide semiconductor layer, a source-drain electrode, and a passivation layer in that order from the substrate, wherein

the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer;

the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on, and is in direct contact with, both a source-drain electrode and a passivation layer;

the second oxide semiconductor layer comprises Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate; and

.

3. The thin-film transistor structure of claim 1, wherein the first oxide semiconductor layer further comprises at least one metal element selected from the group consisting of Al, Ga, and Sn.

5. The thin-film transistor structure of claim 1, wherein the passivation layer is formed by a chemical vapor deposition method.

7. A thin-film transistor comprising the thin-film transistor structure of claim 1.

8. A display device comprising the thin-film transistor of claim 7.

9. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises In.

10. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises Ga.

11. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises Zn.

12. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises In and Ga.

13. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises In and Zn.

14. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises Ga and Zn.

15. The thin-film transistor structure of claim 1, wherein the second oxide semiconductor layer comprises In, Ga and Zn.

16. The thin-film transistor structure of claim 1, wherein the first oxide semiconductor layer further comprises Al.

17. The thin-film transistor structure of claim 1, wherein the first oxide semiconductor layer further comprises Ga.

18. The thin-film transistor structure of claim 1, wherein the first oxide semiconductor layer further comprises Sn.

2. A thin-film transistor structure comprising a substrate, an oxide semiconductor layer, an etch stop layer, and a source-drain electrode in that order from the substrate, wherein

the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer;

the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on, and is in direct contact with, both the etch stop layer and the source-drain electrode;

the second oxide semiconductor layer comprises Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate; and

.

4. The thin-film transistor structure of claim 2, wherein the first oxide semiconductor layer further comprises at least one metal element selected from the group consisting of Al, Ga, and Sn.

6. The thin-film transistor structure of claim 2, wherein the etch stop layer is formed by a chemical vapor deposition method.