HIGH PERFORMANCE PRINTED CIRCUIT BOARD

• US 20140326495A1
• Filed: 08/27/2012
• Published: 11/06/2014
• Est. Priority Date: 08/25/2011
• Status: Abandoned Application

• Current Assignee: Amphenol Corporation
• Original Assignee: Amphenol Corporation
• Inventors: Paniagua, Jose Ricardo
• Application Number:
  US14/240,960
• Publication Number:
  US 20140326495A1
• Time in Patent Office: Days
• US Class Current: 174/266
• CPC Class Codes: G06F 2119/10 Noise analysis or noise optimisation
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H05K 1/0225 Single or multiple openings in a shielding, ground or power plane H05K1/0227 takes precedence
• CPC Class Codes: H05K 1/0245 Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
• CPC Class Codes: H05K 1/0251 related to vias or transitions between vias and transmission lines
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 2201/0784 Uniform resistance, i.e. equalizing the resistance of a number of conductors
• CPC Class Codes: H05K 2201/09372 Pads and lands
• CPC Class Codes: H05K 2201/095 Conductive through-holes or vias
• CPC Class Codes: H05K 2201/09718 Clearance holes
• CPC Class Codes: H05K 2201/09727 Varying width along a single conductor; Conductors or pads having different widths
• CPC Class Codes: H05K 2203/0207 Partly drilling through substrate until a controlled depth, e.g. with end-point detection
• CPC Class Codes: H05K 2203/0242 Cutting around hole, e.g. for disconnecting land or Plated Through-Hole [PTH] or for partly removing a PTH
• CPC Class Codes: H05K 3/0005 for designing circuits by computer
• CPC Class Codes: H05K 3/0047 Drilling of holes
• CPC Class Codes: H05K 3/10 in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
• CPC Class Codes: H05K 3/42 Plated through-holes or plated via connections
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A printed circuit board for carrying high frequency signals. Conducting structures of the printed circuit board are shaped within breakout regions to limit impedance discontinuities in the signal paths between vias and conductive traces within the printed circuit board. Values of parameters of traces or anti-pads, for example, may be adjusted to provide a desired impedance. The specific values selected as part of designing a printed circuit board may match the impedance of the breakout region to that of the via. The parameters for which values are selected may include the trace width, thickness, spacing, length over an anti-pad or angle of exit from the breakout region.

Claims

1. A printed circuit board comprising:

an insulating portion;

a plurality of conductive traces disposed in a plurality of planes, the plurality of conductive traces being supported by the insulating portion; and

conductive vias electrically interconnecting predetermined conductive traces of the plurality of conductive traces, wherein the conductive traces connect to respective conductive vias in breakout regions and wherein at least one parameter of a breakout region is configured to provide a desired electrical characteristic.

2. A printed circuit board as defined in claim 1, wherein the at least one parameter of the breakout region is configured to provide a desired impedance profile in the breakout region.

3. A printed circuit board as defined in claim 1, wherein the at least one parameter of the breakout region is configured to limit impedance discontinuities in the breakout region.

4. A printed circuit board as defined in claim 1, wherein breakout trace portions in the breakout region have a different width and/or thickness than trace portions outside the breakout region.

5. A printed circuit board as defined in claim 1, wherein breakout trace portions are configured to match an impedance of a connected via.

6. A printed circuit board as defined in claim 1, wherein breakout trace portions in breakout region are configured to match an impedance of trace portions outside the breakout region.

7. A printed circuit board as defined in claim 1, wherein:

the at least one parameter comprises trace width; and

breakout trace portions have different widths based on proximity to a ground plane and/or anti-pad.

8. A printed circuit board as defined in claim 1, wherein:

the conductive vias comprise backdrilled vias and non-back drilled vias; and

breakout regions connected to the backdrilled vias have different values of the at least one parameter than breakout regions connected to the non-back drilled vias.

9. A printed circuit board as defined in claim 1, wherein:

the conductive traces comprise a pair of traces passing through the same breakout region, and the at least one parameter comprises a spacing between the traces of the pair.

10. A printed circuit board as defined in claim 1, wherein:

the conductive traces comprise a pair of traces passing through the same breakout region and the traces of the pair jog towards each other within the same breakout region.

11. A printed circuit board as defined in claim 1, wherein:

the conductive traces change width over the breakout region.

12. A printed circuit board as defined in claim 1, wherein:

the at least one parameter comprises an angle at which a breakout trace portion exits a connected via.

13. A printed circuit board as defined in claim 1, wherein:

the breakout region includes an anti-pad; and

the at least one parameter comprises a length of a breakout trace portion over the anti-pad.

14. A printed circuit board as defined in claim 1, wherein:

the breakout region includes an anti-pad; and

the at least one parameter comprises a size of the anti-pad.

15. A printed circuit board as defined in any of claims claim 1, wherein:

the at least one parameter comprises a direction of exit of a breakout trace portion from the breakout region.

16. A printed circuit board as defined in claim 1, wherein:

the breakout region includes an anti-pad in a ground plane; and

the at least one parameter comprises a width of a breakout trace portion over the anti-pad, the width being greater over the anti-pad than a width of the trace over the ground plane.

17. A method of fabricating a printed circuit board, comprising:

configuring, by a computing system, electrical interconnections of a printed circuit board, the printed circuit board including at least one insulating sheet, conductive vias between different layers of the printed circuit board, and conductive traces connected to the vias, wherein the conductive traces connect to respective vias in breakout regions;

selecting, by the computing system, at least one parameter of a breakout region to provide a desired electrical characteristic;

patterning conductive structures on the at least one insulating sheet to provide the configured electrical interconnections; and

forming the at least one insulating sheet into the printed circuit board.

18. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises selecting the parameter to provide a desired impedance profile in the breakout region.

19. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises selecting the at least one parameter to limit impedance discontinuities in the breakout region.

20. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises configuring breakout trace portions to match an impedance of a connected via.

21. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises configuring breakout trace portions to match an impedance of a connected trace.

22. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises selecting a width and/or a thickness of a breakout trace portion.

23. A method of fabricating a printed circuited board as defined in claim 17, wherein selecting at least one parameter comprises selecting an angle at which a breakout trace portion exits a connected via.

24. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises selecting a spacing between breakout trace portions in the breakout region.

25. A method of fabricating a printed circuit board as defined in claim 17, wherein the breakout region includes an anti-pad and wherein selecting at least one parameter comprises selecting a length of a breakout trace portion over the anti-pad.

26. A method of fabricating a printed circuit board as defined in claim 17, wherein the breakout region includes an anti-pad and wherein selecting at least one parameter comprises selecting a size of the anti-pad.

27. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises selecting a direction of exit of a breakout trace portion from the breakout region.

28. A method of fabricating a printed circuit board as defined in claim 17, wherein selecting at least one parameter comprises compensating for a discontinuity in a ground plane so as to limit impedance discontinuities in the breakout region.

29. (canceled)

30. A computer-readable storage device encoded with computer-executable instructions that, when executed by a computing device, perform a method of designing a printed circuit board, comprising:

configuring electrical interconnections of the printed circuit board, the printed circuit including at least one insulating sheet, conductive vias between different layers of the printed circuit board and conductive traces connected to respective vias, wherein the conductive traces connect to respective vias in breakout regions; and

selecting at least one parameter of a breakout region to provide a desired electrical characteristic.