Power module with cooling structure on bonding substrate for cooling an attached semiconductor chip

• US 20140327127A1
• Filed: 05/03/2013
• Published: 11/06/2014
• Est. Priority Date: 05/03/2013
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Geitner, Ottmar, Schwarz, Alexander, Herbrandt, Alexander, Koenig, Lothar, Uhlemann, Andre, HABLE, Wolfram, Grassmann, Andreas, Winter, Frank
• Granted Patent: US 9,275,926 B2
• Time in Patent Office: Days
• US Class Current: 257/712
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2224/37099 Material
• CPC Class Codes: H01L 2224/37599 Material
• CPC Class Codes: H01L 2224/40137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/84801 Soldering or alloying
• CPC Class Codes: H01L 23/34 Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements thermal treatment apparatus H01L21/00
• CPC Class Codes: H01L 23/3735 Laminates or multilayers, e.g. direct bond copper ceramic substrates
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/467 by flowing gases, e.g. air H01L23/473 takes precedence
• CPC Class Codes: H01L 23/473 by flowing liquids H01L23/4332, H01L23/4338 take precedence
• CPC Class Codes: H01L 24/33 of a plurality of layer connectors
• CPC Class Codes: H01L 24/36 Structure, shape, material or disposition of the strap connectors prior to the connecting process
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/84 using a strap connector
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19107 : off-chip wires

Abstract

According to an exemplary embodiment, a power module is provided which comprises a semiconductor chip, a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip, and an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.

Claims

1. A power module, comprising:

a semiconductor chip having a first main surface and a second main surface opposing the first main surface;

a first bonding substrate having a first bonding surface coupled to the first main surface of the semiconductor chip and having a first heat removal surface opposing the first bonding surface;

a second bonding substrate having a second bonding surface coupled to the second main surface of the semiconductor chip and having a second heat removal surface opposing the second bonding surface;

a first cooling structure on the first heat removal surface configured for removing heat from the semiconductor chip when interacting with cooling fluid; and

a second cooling structure on the second heat removal surface configured for removing heat from the semiconductor chip when interacting with cooling fluid.

2. The power module according to claim 1, wherein the first bonding substrate is configured as a first metal—

electric insulator and thermal conductor—

metal sheet stack with its metallic first bonding surface coupled to the first main surface of the semiconductor chip and with its metallic first heat removal surface connected directly to the first cooling structure.

3. The power module according to claim 2, wherein the second bonding substrate is configured as a second metal—

electric insulator and thermal conductor—

metal sheet stack with its metallic second bonding surface coupled to the second main surface of the semiconductor chip and with its metallic second heat removal surface connected directly to the second cooling structure.

4. The power module according to claim 1, wherein at least one of the first bonding substrate and the second bonding substrate comprises one of the group consisting of a Direct Copper Bonding substrate, and a Direct Aluminium Bonding substrate.

5. The power module according to claim 1, wherein at least one of the first cooling structure and the second cooling structure comprises an array of cooling loops.

6. The power module according to claim 5, wherein the array of cooling loops comprises at least one of the group consisting of meandrically bent bond wires and meandrically bent bond ribbons.

7. The power module according to claim 1,

comprising a thermal interconnect structure bridging the first bonding surface of the first bonding substrate and the first main surface of the semiconductor chip;

wherein the second bonding substrate is directly connected to the second main surface of the semiconductor chip at the second bonding surface.

8. The power module according to claim 1, comprising a mould compound encapsulating the semiconductor chip, the first bonding substrate, and the second bonding substrate.

9. The power module according to claim 8, wherein the mould compound connects continuously to the first bonding substrate and to the second bonding substrate so that an exterior surface of each of the first bonding substrate and the second bonding substrate is in flush with an exterior surface of the mould compound and that the first and second cooling structures protrude over the respective exterior surface.

10. The power module according to claim 8, comprising a lead frame for electrically connecting the semiconductor chip to a receptacle of a connectable device, wherein the lead frame extends partially out of the mould compound in parallel to the first heat removal surface and the second heat removal surface.

11. The power module according to claim 1, comprising a cooling casing enclosing the semiconductor chip, the first bonding substrate, the second bonding substrate, the first cooling structure, and the second cooling structure and comprising a cooling fluid supply for supplying the cooling fluid to the first cooling structure and the second cooling structure and a cooling fluid drain for draining the cooling fluid after thermal exchange with the first cooling structure and the second cooling structure.

12. A power module, comprising:

a semiconductor chip having a first main surface and a second main surface opposing the first main surface;

a two-dimensional first array of cooling loops thermally coupled to the first main surface and configured for removing heat from the semiconductor chip when interacting with cooling fluid; and

a two-dimensional second array of cooling loops thermally coupled to the second main surface and configured for removing heat from the semiconductor chip when interacting with cooling fluid.

13. The power module according to claim 12, further comprising:

a first metal—

electric insulator and thermal conductor—

metal sheet stack having a metallic first bonding surface coupled to the first main surface of the semiconductor chip and having a metallic first heat removal surface opposing the first bonding surface and connected to the first array of cooling loops;

a second metal—

electric insulator and thermal conductor—

metal sheet stack having a metallic second bonding surface coupled to the second main surface of the semiconductor chip and having a metallic second heat removal surface opposing the second bonding surface and connected to the second array of cooling loops.

14. The power module according to claim 12, wherein at least one of the first two-dimensional array of cooling loops and the second two-dimensional array of cooling loops is configured as a set of parallel lines of cooling loops, wherein cooling loops of different lines are staggered relative to one another.

15. A power module, comprising:

a semiconductor chip;

a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip; and

an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.

16. The power module according to claim 15, wherein the semiconductor chip comprises at least one integrated circuit component of a group consisting of a switch, a diode, a half bridge, and an inverter.

17. The power module according to claim 15, wherein the electric insulator sheet is made of a material which has a thermal conductivity of at least 100 W/(mK).

18. A method of manufacturing a power module, the method comprising:

coupling a first bonding surface of a first bonding substrate to a first main surface of a semiconductor chip;

coupling a second bonding surface of a second bonding substrate to a second main surface of the semiconductor chip, wherein the second main surface opposes the first main surface;

arranging a first cooling structure on a first heat removal surface of the first bonding substrate, wherein the first heat removal surface opposes the first bonding surface;

arranging a second cooling structure on a second heat removal surface of the second bonding substrate, wherein the second heat removal surface opposes the second bonding surface; and

configuring each of the first cooling structure and the second cooling structure for removing heat from the semiconductor chip when interacting with cooling fluid.

19. A method of manufacturing a power module, the method comprising:

thermally coupling a first two-dimensional array of cooling loops to a first main surface of a semiconductor chip;

thermally coupling a second two-dimensional array of cooling loops to a second main surface of the semiconductor chip, wherein the second main surface opposes the first main surface; and

configuring each of the first two-dimensional array of cooling loops and the second two-dimensional array of cooling loops for removing heat from the semiconductor chip when interacting with cooling fluid.