PACKAGES AND METHODS FOR PACKAGING

• US 20140332947A1
• Filed: 05/09/2014
• Published: 11/13/2014
• Est. Priority Date: 11/19/2010
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Yang, Jicheng, Chowdhury, Asif, Mena, Manolo, Gao, Jia, Sullivan, Richard, Goida, Thomas, Tiongson, Carlo, Sengupta, Dipak
• Granted Patent: US 9,142,470 B2
• Time in Patent Office: Days
• US Class Current: 257/710
• CPC Class Codes: B81B 2201/0257 Microphones or microspeakers
• CPC Class Codes: B81B 7/0064 for protecting against electromagnetic or electrostatic interferences
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/053 the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
• CPC Class Codes: H01L 23/06 characterised by the material of the container or its electrical properties
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/16152 Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

Packaged integrated devices and methods of forming the same are provided. In one embodiment, a packaged integrated device includes a package substrate, a package lid, and an integrated circuit or microelectromechanical systems (MEMS) device. The package lid is mounted to a first surface of the package substrate using an epoxy, and the package lid and the package substrate define a package interior. The package lid includes an interior coating suited to good adhesion with the epoxy, and an exterior coating suited to RF shielding, where the materials of the interior and exterior coatings are different. In one example, the interior lid coating is nickel whereas the exterior lid coating is tin.

Claims

1. (canceled)

2. A packaged integrated device comprising:

a package substrate;

a package lid attached to a top surface of the package substrate with an adhesive, the package lid and the package substrate defining a package interior, the package lid including a lip extending from a perimeter of the package lid;

a three-dimensional locking feature formed in the top surface of the package substrate to enhance the attachment of the package lid to the package substrate, the lip of the package lid coupled with the three-dimensional locking feature such that at least a portion of the adhesive is disposed between the lip and the locking feature; and

an integrated device die mounted within the package interior.

3. The packaged integrated device of claim 2, wherein the three-dimensional locking feature comprises at least two planar surfaces of the package substrate, the at least two planar surfaces offset from one another in a direction perpendicular to the top surface of the package substrate.

4. The packaged integrated device of claim 3, wherein at least a portion of the lip of the package lid is attached to at least one of the at least two planar surfaces of the package substrate by the adhesive.

5. The packaged integrated device of claim 2, wherein the package substrate includes a nonconductive layer and a conductive trace disposed on the nonconductive layer.

6. The packaged integrated device of claim 5, wherein the package lid is mounted to portions of both the conductive trace and the nonconductive layer using the adhesive.

7. The packaged integrated device of claim 5, wherein the lip of the package lid includes an interface surface for mounting the package lid to the package substrate using the adhesive, and wherein the conductive trace is patterned to alternately expose portions of the nonconductive layer and the conductive trace to the adhesive around an annular pattern corresponding to the interface surface.

8. The packaged integrated device of claim 2, wherein the adhesive comprises an epoxy.

9. The packaged integrated device of claim 2, wherein the package lid includes a first conductive layer, a second conductive layer and a core disposed between the first and second conductive layers, wherein the first conductive layer defines a first surface of the package lid facing the package interior, and wherein the second conductive layer defines a second surface of the package lid opposite the first surface, and wherein a portion of the first conductive layer contacts the adhesive.

10. The packaged integrated device of claim 9, wherein the second conductive layer has a radio frequency conductivity less than that of the first conductive layer.

11. The packaged integrated device of claim 9, wherein the first conductive layer has an attachment strength to the adhesive which is greater than that of the second conductive layer.

12. The packaged integrated device of claim 9, wherein the second conductive layer comprises tin (Sn) and the first conductive layer comprises nickel (Ni).

13. The packaged integrated device of claim 9, wherein the first conductive layer comprises a metal selected from group consisting of nickel (Ni), silver (Ag), gold (Au), and copper (Cu).

14. The packaged integrated device of claim 9, wherein the second conductive layer comprises a metal selected from the group consisting of tin (Sn), silver (Ag), gold (Au), and copper (Cu).

15. The packaged integrated device of claim 9, wherein the core comprises at least one of stainless steel, copper (Cu), aluminum (Al) and a liquid crystal polymer (LCP).

16. The packaged integrated device of claim 2, wherein the integrated device die is a microelectromechanical systems (MEMS) device die.

17. The packaged integrated device of claim 2, wherein the integrated device die is a microphone device die.

18. The packaged integrated device of claim 2, wherein the package lid is shaped to define a concavity.

19. A packaged integrated device comprising:

a package substrate comprising a nonconductive layer and a conductive layer, the package substrate patterned such that the nonconductive layer and the conductive layer are alternately exposed at a top surface of the package substrate;

a package lid attached to the top surface of the package substrate with an adhesive, the package lid and the package substrate defining a package interior, the package lid including a lip extending from a perimeter of the package lid, the lip attached with the adhesive to the alternately exposed nonconductive and conductive layers at the top surface of the package substrate; and

an integrated device die mounted within the package interior.

20. The packaged integrated device of claim 19, wherein the package lid includes a first conductive layer, a second conductive layer and a core disposed between the first and second conductive layers, wherein the first conductive layer defines a first surface of the package lid facing the package interior, and wherein the second conductive layer defines a second surface of the package lid opposite the first surface, and wherein a portion of the first conductive layer contacts the adhesive.

21. The packaged integrated device of claim 19, wherein the exposed nonconductive layer and the exposed conductive layer are offset from one another in a direction perpendicular to the top surface of the package substrate.