TECHNIQUE TO REDUCE THE THIRD HARMONIC OF AN ON-STATE RF SWITCH

• US 20140335801A1
• Filed: 05/07/2014
• Published: 11/13/2014
• Est. Priority Date: 05/07/2013
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: RF Micro Devices Incorporated (Qorvo, Inc.)
• Inventors: Bolton, Eric K., Kerr, Daniel Charles, Granger-Jones, Marcus
• Granted Patent: US 9,236,957 B2
• Time in Patent Office: Days
• US Class Current: 455/83
• CPC Class Codes: H04B 15/02 Reducing interference from electric apparatus by means located at or near the interfering apparatus

Abstract

RF switching circuitry includes an RF switch coupled between an input node and an output node. Distortion compensation circuitry is coupled in parallel with the RF switch between the input node and the output node. The RF switch is configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal. The distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node. Boosting a portion of the RF signal that is being compressed by the RF switch allows a signal passing through the RF switch to remain substantially linear, thereby improving the performance of the RF switching circuitry.

Claims

1. Circuitry comprising:

a radio frequency (RF) switch coupled between an input node and an output node and configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal; and

distortion compensation circuitry coupled in parallel with the RF switch between the input node and the output node, the distortion compensation circuitry configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node.

2. The circuitry of claim 1 wherein the distortion compensation circuitry comprises:

a compensation switch; and

a first compensation diode coupled in an anti-parallel configuration with a second compensation diode to form an anti-parallel diode pair, such that the anti-parallel diode pair is coupled in series with the compensation switch between the input node and the output node.

3. The circuitry of claim 2 wherein the distortion compensation circuitry further comprises:

a first compensation resistor coupled between the input node and the anti-parallel diode pair; and

a second compensation resistor coupled between the anti-parallel diode pair and the compensation switch.

4. The circuitry of claim 2 wherein the compensation switch is controlled by a second switching control signal, such that when the RF switch is closed, the compensation switch is also closed, and when the RF switch is open, the compensation switch is also open.

5. The circuitry of claim 4 further comprising switching control circuitry configured to deliver the first switching control signal to the RF switch and the second switching control signal to the compensation switch.

6. The circuitry of claim 1 wherein the distortion compensation circuitry comprises:

a first compensation diode coupled in an anti-parallel configuration with a second compensation diode to form an anti-parallel diode pair;

a first compensation switch coupled between the input node and the anti-parallel diode pair;

a second compensation switch coupled between the output node and the anti-parallel diode pair; and

a third compensation switch coupled in parallel with the first compensation diode and the second compensation diode.

7. The circuitry of claim 6 wherein the distortion compensation circuitry further comprises:

a first compensation resistor coupled between the first compensation switch and the anti-parallel diode pair; and

a second compensation resistor coupled between the second compensation switch and the anti-parallel diode pair.

8. The circuitry of claim 6 wherein the first compensation switch and the second compensation switch comprise one or more NMOS transistors, and the third compensation switch comprises one or more PMOS transistors.

9. The circuitry of claim 8 wherein the first compensation switch, the second compensation switch, and the third compensation switch are controlled by a second switching control signal, such that when the RF switch is closed, the first compensation switch and the second compensation switch are also closed, while the third compensation switch is open, and when the RF switch is open, the first compensation switch and the second compensation switch are also open, while the third compensation switch is closed.

10. The circuitry of claim 9 further comprising switching control circuitry configured to deliver the first switching control signal to the RF switch and the second switching control signal to the first compensation switch, the second compensation switch, and the third compensation switch.

11. The circuitry of claim 7 further comprising:

a first compensation capacitor coupled between the input node and the first compensation switch; and

a second compensation capacitor coupled between the output node and the second compensation switch.

12. The circuitry of claim 11 wherein the first compensation switch, the second compensation switch, and the third compensation switch are controlled independently of the RF switch.

13. The circuitry of claim 11 further comprising:

a third compensation capacitor coupled between an anode of the first compensation diode and the first compensation resistor; and

a fourth compensation capacitor coupled between an anode of the second compensation diode and the second compensation resistor.

14. The circuitry of claim 13 further comprising compensation bias circuitry configured to provide a biasing voltage to the anode of the first compensation diode and the second compensation diode.

15. The circuitry of claim 1 wherein the distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into the input node.

16. The circuitry of claim 1 wherein the distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into the output node.

17. A mobile terminal comprising:

an antenna;

a receiver front end;

a radio frequency transmitter section; and

antenna tuning circuitry coupled between the antenna, the receiver front end, and the radio frequency transmitter section, the antenna tuning circuitry comprising;

a radio frequency (RF) switch coupled between an input node and an output node and configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal; and

distortion compensation circuitry coupled in parallel with the RF switch between the input node and the output node, the distortion compensation circuitry configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node.

18. The mobile terminal of claim 17 wherein the output node of the antenna tuning circuitry is coupled to a fixed impedance.

19. The mobile terminal of claim 18 wherein the antenna tuning circuitry is configured to alter the impedance presented to the antenna by selectively closing the RF switch.

20. The mobile terminal of claim 17 wherein the distortion compensation circuitry comprises:

a compensation switch; and

a first compensation diode coupled in an anti-parallel configuration with a second compensation diode to form an anti-parallel diode pair, such that the anti-parallel diode pair is coupled in series with the compensation switch between the input node and the output node.

21. The mobile terminal of claim 20 wherein the distortion compensation circuitry further comprises:

a first compensation resistor coupled between the input node and the anti-parallel diode pair; and

a second compensation resistor coupled between the anti-parallel diode pair and the compensation switch.

22. The mobile terminal of claim 20 wherein the compensation switch is controlled by a second switching control signal, such that when the RF switch is closed, the compensation switch is also closed, and when the RF switch is open, the compensation switch is also open.

23. The mobile terminal of claim 17 wherein the distortion compensation circuitry comprises:

a first compensation diode coupled in an anti-parallel configuration with a second compensation diode to form an anti-parallel diode pair;

a first compensation switch coupled between the input node and the anti-parallel diode pair;

a second compensation switch coupled between the output node and the anti-parallel diode pair; and

a third compensation switch coupled in parallel with the first compensation diode and the second compensation diode.

24. The mobile terminal of claim 23 wherein the distortion compensation circuitry further comprises:

a first compensation resistor coupled between the first compensation switch and the anti-parallel diode pair; and

a second compensation resistor coupled between the second compensation switch and the anti-parallel diode pair.

25. The mobile terminal of claim 23 wherein the first compensation switch and the second compensation switch comprise one or more NMOS transistors, and the third compensation switch comprises one or more PMOS transistors.

26. The mobile terminal of claim 25 wherein the first compensation switch, the second compensation switch, and the third compensation switch are controlled by a second switching control signal, such that when the RF switch is closed, the first compensation switch and the second compensation switch are also closed, while the third compensation switch is open, and when the RF switch is open, the first compensation switch and the second compensation switch are also open, while the third compensation switch is closed.

27. The mobile terminal of claim 26 further comprising switching control circuitry configured to deliver the first switching control signal to the RF switch and the second switching control signal to the first compensation switch, the second compensation switch, and the third compensation switch.

28. The mobile terminal of claim 24 wherein the distortion compensation circuitry further comprises:

a first compensation capacitor coupled between the input node and the first compensation switch; and

a second compensation capacitor coupled between the output node and the second compensation switch.

29. The mobile terminal of claim 28 wherein the first compensation switch, the second compensation switch, and the third compensation switch are controlled independently of the RF switch.

30. The mobile terminal of claim 28 wherein the distortion compensation circuitry further comprises:

a third compensation capacitor coupled between an anode of the first compensation diode and the first compensation resistor; and

a fourth compensation capacitor coupled between an anode of the second compensation diode and the second compensation resistor.

31. The mobile terminal of claim 30 wherein the distortion compensation circuitry further comprises compensation bias circuitry configured to provide a biasing voltage to the anode of the first compensation diode and the second compensation diode.

32. The circuitry of claim 17 wherein the distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into the input node.

33. The circuitry of claim 17 wherein the distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into the output node.