METHOD AND ARCHITECTURE FOR DATA CHANNEL VIRTUALIZATION IN AN EMBEDDED SYSTEM

• US 20140337860A1
• Filed: 05/07/2013
• Published: 11/13/2014
• Est. Priority Date: 05/07/2013
• Status: Active Grant

• Current Assignee: Ittiam Systems Pte Ltd
• Original Assignee: Ittiam Systems Pte Ltd
• Inventors: ANANDA, RANJITH KAGATHI, SUBRAMANYA, PRASHANTH DIXIT, KIKKERI, DARSHANDATT SHIVADATTA, KUNDU, SWAPAN KUMAR, TURAKANI, RAJENDRA CHANDRASHEKHAR
• Granted Patent: US 9,547,612 B2
• Time in Patent Office: Days
• US Class Current: 719/313
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

A method for providing data channel virtualization between one or more devices and one or more applications is disclosed. In one example, a device policy manager (DPM) is initialized by creating an instance of the DPM before creating any application. Further, the DPM is configured for device management by identifying each device of the one or more devices and its associated device data channel (DDC) to be managed by the DPM. Each of the one or more devices is identified using an associated device identity (ID) and its corresponding DDC. Furthermore, one or more virtual data channels (VDCs) are created and provided to the one or more associated applications upon receiving a request from each of the one or more applications using a device identity (ID) and any application specific configuration parameters provided by the application.

Claims

1. An architecture for data channel virtualization in an embedded system, comprising:

a device policy manager (DPM) that provides seamless access to one or more devices using one or more device data channels (DDCs) from one or more applications simultaneously, provides one or more virtual data channels (VDCs) to the one or more applications, respectively, such that each of the one or more applications accesses its VDC, defines integration rules to follow for the one or more applications accessing the one or more devices simultaneously through the DPM, and enables the architecture for achieving the simultaneous access to the one or more devices by the one or more applications.

2. The architecture of claim 1, wherein the DPM allows each of the one or more applications to configure virtual channel properties (VCPs) that define expected data input/output for the application on its VDC and further provides configurability to select each of the one or more VDCs to contribute to an eventual output of the DDC.

3. The architecture of claim 1, wherein the DPM comprises:

a DPM controller for maintaining mapping information between each of the one or more VDCs and its associated DDC and for updating the mapping information dynamically upon addition or deletion of a VDC;

one or more subsystems for managing the one or more DDCs associated with the one or more devices; and

a component integration layer for providing platform agnostic access to the one or more devices via the associated one or more DDCs.

4. The architecture of claim 3, wherein the one or more devices include input only devices, output only devices and input/output devices.

5. The architecture of claim 3, wherein the DPM controller routes data associated with the one or more VDCs to an associated one of the one or more subsystems based on the mapping information.

6. The architecture of claim 3, wherein each of the one or more subsystems comprises:

an active thread module (ATM) for running its own thread and handling data exchange with the associated DDC and for performing data transformation that is common across the one or more VDCs;

one or more virtual channel controllers (VCCs) for controlling data exchange between the ATM and the one or more applications and for performing independent data transformation for each of the one or more VDCs;

a buffer manager module for buffer/queue management between the ATM and the one or more VCCs and also for data exchange between the DDC and associated one or more VDCs; and

a subsystem controller for controlling the ATM, the buffer manager module and the one or more VCCs.

7. The architecture of claim 6, wherein the data transformation performed by the ATM, one or more VCCs and buffer manager module includes data sharing, space/time division multiplexing and/or space/time division de-multiplexing.

8. The architecture of claim 6, wherein the buffer manager module comprises:

a buffer pool; and

one or more buffer queues for the one or more applications, wherein a number of slots in each of the one or more buffer queues is configurable by each of the one or more applications.

9. A method for providing data channel virtualization, comprising:

initializing a device policy manager (DPM) by creating an instance of the DPM before creating any application;

configuring the DPM for device management by identifying each device of one or more devices and its associated device data channel (DDC) to be managed by the DPM, wherein each of the one or more devices is identified using an associated device identity (ID) and its corresponding DDC; and

creating one or more virtual data channels (VDCs) and providing them to one or more associated applications upon receiving a request from each of the one or more applications using a device identity (ID) and any application specific configuration parameters provided by the application.

10. The method of claim 9, wherein initializing the DPM comprises:

creating a DPM controller for maintaining mapping information between each of the one or more VDCs and its associated DDC and for updating the mapping information dynamically upon addition or deletion of a VDC; and

creating a component integration layer for providing platform agnostic access to the one or more devices via the associated one or more DDCs.

11. The method of claim 9, wherein configuring the DPM for device management comprises:

creating one or more subsystems for managing the one or more DDCs associated with the one or more devices.

12. The method of claim 11, wherein creating the one or more subsystems, comprises:

creating an active thread module (ATM) for running its own thread and handling data exchange with the associated DDC and for performing data transformation that is common across the one or more VDCs;

creating a buffer manager module including a buffer pool for buffer management between the ATM and the one or more VCCs and also for data exchange between the DDC and associated one or more VDCs; and

creating a subsystem controller for controlling the ATM, the buffer manager module and the one or more VCCs.

13. The method of claim 12, wherein creating one or more VDCs comprises:

creating one or more virtual channel controllers (VCCs) for controlling data exchange between the ATM and the one or more applications and for performing independent data transformation for each of the one or more VDCs; and

creating one or more buffer queues for data exchange between the ATM and the one or more VCCs.

14. The method of claim 9, further comprising:

forming a mapping table including each of the one or more VDCs and its associated subsystem by the DPM controller, wherein an associated one of the subsystems is assigned, by the DPM controller, upon receiving a data channel request on the one or more VDCs from one of the one or more applications.

15. An embedded system, comprising:

a processor communicatively coupled to one or more devices and one or more applications programs; and

memory operatively coupled to the processor, wherein the memory having disposed in it a device policy manager (DPM) that is capable of providing seamless access to one or more devices using one or more device data channels (DDCs) from one or more applications simultaneously, providing one or more virtual data channels (VDCs) to the one or more applications, respectively, such that each of the one or more applications accesses its VDC, defining integration rules to follow for the one or more applications accessing the one or more devices simultaneously through the DPM, and enabling an architecture for achieving the simultaneous access to the one or more devices by the one or more applications.

16. The embedded system of claim 15, wherein the DPM allows each of the one or more applications to configure virtual channel properties (VCPs) that define expected data input/output for the application on its VDC and further provides configurability to select each of the one or more VDCs to contribute to an eventual output of the DDC.

17. The embedded system of claim 15, wherein the DPM comprises:

a DPM controller for maintaining mapping information between each of the one or more VDCs and its associated DDC and for updating the mapping information dynamically upon addition or deletion of a VDC;

one or more subsystems for managing the one or more DDCs associated with the one or more devices; and

a component integration layer for providing platform agnostic access to the one or more devices via the associated one or more DDCs.

18. The system of claim 17, wherein the one or more devices include input only devices, output only devices and input/output devices.

19. The embedded system of claim 17, wherein the DPM controller routes data associated with the one or more VDCs to an associated one of the one or more subsystems based on the mapping information.

20. The embedded system of claim 17, wherein each of the one or more subsystems comprises:

an active thread module (ATM) for running its own thread and handling data exchange with the associated DDC and for performing data transformation that is common across the one or more VDCs;

one or more virtual channel controllers (VCCs) for controlling data exchange between the ATM and the one or more applications and for performing independent data transformation for each of the one or more VDCs;

a buffer manager module for buffer/queue management between the ATM and the one or more VCCs and also for data exchange between the DDC and associated one or more VDCs; and

a subsystem controller for controlling the ATM, the buffer manager module and the one or more VCCs.

21. The embedded system of claim 20, wherein the data transformation performed by the ATM, one or more VCCs and buffer manager module includes data sharing, space/time division multiplexing and/or space/time division de-multiplexing.

22. The embedded system of claim 20, wherein the buffer manager module comprises:

a buffer pool; and

one or more buffer queues for the one or more applications, wherein a number of slots in each of the one or more buffer queues is configurable by each of the one or more applications.

23. A non-transitory computer-readable storage medium having instructions that, when executed by a computing device, cause the computing device to:

initialize a device policy manager (DPM) by creating an instance of the DPM before creating any application;

configure the DPM for device management by identifying each device of one or more devices and its associated device data channel (DDC) to be managed by the DPM, wherein each of the one or more devices is identified using an associated device identity (ID) and its corresponding DDC; and

create one or more virtual data channels (VDCs) and provide them to the one or more associated applications upon receiving a request from each of the one or more applications using a device identity (ID) and any application specific configuration parameters provided by the application.

24. The non-transitory computer-readable storage medium of claim 23, wherein the instructions cause the computing device to:

create a DPM controller for maintaining mapping information between each of the one or more VDCs and its associated DDC and for updating the mapping information dynamically upon addition or deletion of a VDC; and

create a component integration layer for providing platform agnostic access to the one or more devices via the associated one or more DDCs.

25. The non-transitory computer-readable storage medium of claim 23, wherein the instructions cause the computing device to:

create one or more subsystems for managing the one or more DDCs associated with the one or more devices.