PHOTOELECTRIC CONVERSION APPARATUS AND IMAGING SYSTEM

• US 20140346321A1
• Filed: 05/20/2014
• Published: 11/27/2014
• Est. Priority Date: 05/24/2013
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Kinugasa, Tomohisa
• Granted Patent: US 9,332,203 B2
• Time in Patent Office: Days
• US Class Current: 250/208.1
• CPC Class Codes: H04N 23/672 based on the phase difference signals
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/671 for non-uniformity detection or correction
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

A photoelectric conversion apparatus includes a photoelectric-conversion element configured to output electric charges generated by photoelectric conversion to a first node, and an accumulation circuit having an input terminal connected to the first node and being capable of changing an integral capacitance value. The number of drain or source of a MOS transistor in an OFF state connected to the first node is one.

Claims

1. A photoelectric conversion apparatus comprising:

a photoelectric-conversion element configured to output electric charges generated by photoelectric conversion to a first node; and

an accumulation circuit having an input terminal connected to the first node and being capable of changing an integral capacitance value, wherein

number of drain or source of a MOS transistor in an OFF state connected to the first node is one.

2. The photoelectric conversion apparatus according to claim 1, wherein:

the accumulation circuit has an output terminal connected to a second node; and

the accumulation circuit comprises;

a first switch and a second switch serially connected between the first node and the second node;

a first capacitance connected in parallel with the second switch and having one terminal connected to the second node; and

a second capacitance connected between the first node and the second node.

3. The photoelectric conversion apparatus according to claim 2, wherein the first switch and the second switch are turned on before electric charge accumulation is started by the photoelectric-conversion element to reset the potential of the photoelectric-conversion element, the second switch is turned off in an electric charge accumulation period of the photoelectric-conversion element, and the first switch is fixed to an ON or OFF state to change the integral capacitance value.

4. The photoelectric conversion apparatus according to claim 2, wherein the first switch and the second switch are MOS transistors;

and

a gate voltage generated when the first switch and the second switch are in an OFF state is a voltage that allows a minimum leakage current due to sub-threshold leakage current and GIDL.

5. The photoelectric conversion apparatus according to claim 3, wherein the first switch and the second switch are MOS transistors;

and

a gate voltage generated when the first switch and the second switch are in an OFF state is a voltage that allows a minimum leakage current due to sub-threshold leakage current and GIDL.

6. The photoelectric conversion apparatus according to claim 2, wherein the accumulation circuit has a first differential amplifier circuit having an inverting input terminal connected to the first node, a non-inverting input terminal connected to a reset voltage node, and an output terminal connected to the second node;

and

a sample-and-hold circuit configured to sample and hold voltage based on voltage of the second node.

7. The photoelectric conversion apparatus according to claim 3, wherein the accumulation circuit has a first differential amplifier circuit having an inverting input terminal connected to the first node, a non-inverting input terminal connected to a reset voltage node, and an output terminal connected to the second node;

and

a sample-and-hold circuit configured to sample and hold voltage based on voltage of the second node.

8. The photoelectric conversion apparatus according to claim 4, wherein the accumulation circuit has a first differential amplifier circuit having an inverting input terminal connected to the first node, a non-inverting input terminal connected to a reset voltage node, and an output terminal connected to the second node;

and

a sample-and-hold circuit configured to sample and hold voltage based on voltage of the second node.

9. The photoelectric conversion apparatus according to claim 2, wherein the accumulation circuit has a first amplifying circuit having an input terminal connected to the first node and an output terminal connected to the second node.

10. The photoelectric conversion apparatus according to claim 2, wherein the accumulation circuit has a third switch configured to fix a node between the first switch and the second switch to a reset voltage.

11. The photoelectric conversion apparatus according to claim 10, wherein the second switch and the third switch are turned off in an electric charge accumulation period of the photoelectric-conversion element, and when the first switch is fixed to ON or OFF, the integral capacitance value is changed, and after the electric charge accumulation of the photoelectric-conversion element ends, the first switch and the third switch are turned on and the second switch is turned off.

12. The photoelectric conversion apparatus according to claim 2, wherein the accumulation circuit has:

a third capacitance having a first terminal connected to a node between the first switch and the second switch; and

a fourth switch connected between a second terminal of the third capacitance and the second node.

13. An imaging system comprising:

the photoelectric conversion apparatus according to claim 1; and

a lens configured to condense incident light to the photoelectric conversion apparatus.