SEMICONDUCTOR DEVICE

• US 20140346592A1
• Filed: 12/06/2012
• Published: 11/27/2014
• Est. Priority Date: 12/09/2011
• Status: Abandoned Application

• Current Assignee: DENSO Corporation, Toyota Jidosha Kabushiki Kaisha (Toyota Motor Corporation)
• Original Assignee: DENSO Corporation, Toyota Jidosha Kabushiki Kaisha (Toyota Motor Corporation)
• Inventors: Soeno, Akitaka, Yamamoto, Toshimasa, Watanabe, Yukihiko
• Application Number:
  US14/363,523
• Publication Number:
  US 20140346592A1
• Time in Patent Office: Days
• US Class Current: 257/333
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/512 the variation being parallel to the channel plane
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A vertical MOSFET includes: a semiconductor substrate comprising a drain layer, a drift layer, a body layer, and a source layer; and a trench gate penetrating through the source layer and the body layer from an upper surface of the semiconductor substrate and reaching the drift layer. The trench gate includes a gate electrode; a first insulating film disposed on a bottom surface of a trench formed in the semiconductor substrate; a second insulating film disposed at least on a side surface of the trench, and in contact with the body layer; and a third insulating film disposed between the gate electrode and the second insulating film, and formed of a material of which dielectric constant is higher than a dielectric constant of the second insulating film.

Claims

1. A vertical MOSFET comprising:

a semiconductor substrate comprising a first conductivity type drain layer, a first conductivity type drift layer formed on an upper surface of the drain layer, a second conductivity type body layer formed on an upper surface of the drift layer, and a first conductivity type source layer formed on a part of an upper surface of the body layer; and

a trench gate penetrating through the source layer and the body layer from an upper surface of the semiconductor substrate and reaching the drift layer;

wherein

the trench gate comprises;

a gate electrode;

a first insulating film disposed on a bottom surface of a trench formed in the semiconductor substrate and in contact with the drift laver;

a second insulating film disposed on a side surface of the trench and upper surface of the first insulating film, and in contact with the body layer; and

a third insulating film disposed between the gate electrode and the second insulating film, and formed of a material of which dielectric constant is higher than a dielectric constant of the second insulating film.

2. The MOSFET according to claim 1, wherein

a material of the second insulating film is silicon oxide, and

the dielectric constant of the material of the third insulating film is higher than a dielectric constant of silicon oxide.

3. The MOSFET according to claim 1, wherein

the MOSFET satisfies following formulas (1) and (2), where a dielectric constant of the second insulating film is k2, a thickness of the second insulating film is X nm, a dielectric constant of the third insulating film is k3, and a thickness of the third insulating film is Y nm:

[Math. 5]

X+Y>

50/√

{square root over (2)} 

 

(1)

(k3/k2)(X−

100)+Y<

0 

 

(2).

4. The MOSFET according to claim 3, wherein the MOSFET further satisfies a following formula (3):

[Math. 6]

X+Y>

100/√

{square root over (2)} 

 

(3).

5. The MOSFET according to claim 3, wherein the MOSFET further satisfies a following formula (4):

[Math. 7]

(k3/k2)(X−

50)+Y<

0 

 

(4).

6. The MOSFET according to claims 1-5, wherein the third insulating film is in contact with the gate electrode.