CURRENT SENSING OF SWITCHING POWER REGULATORS

• US 20140347078A1
• Filed: 05/21/2013
• Published: 11/27/2014
• Est. Priority Date: 05/21/2013
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices, Inc.
• Inventors: Qin, Song
• Granted Patent: US 9,791,480 B2
• Time in Patent Office: Days
• US Class Current: 324/713
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

Apparatus and methods for current sensing in switching regulators are disclosed. In certain implementations, a current sensing circuit senses current of a power stage of a power converter. The power converter can include first and second transistors. The current sensing circuit comprises a transistor that is a scaled version of one of the transistors of the power converter. A circuit of the current sensing circuit matches a drain-to-source voltage of the transistor of the current sensing circuit to the corresponding transistor of the power converter. A current mirror generates a current that mirrors the current flowing through the transistor of the current sensing circuit. A first resistor converts the mirrored current to a current sensed signal.

Claims

1. An apparatus comprising:

a current sensing circuit configured to sense current of a power stage of a power converter comprising a first transistor and a second transistor, the current sensing circuit comprising;

a third transistor having a gate, a drain, and a source, wherein the gate of the third transistor is operatively coupled to a gate of the second transistor, wherein the third transistor is a scaled version of the second transistor;

a first circuit configured to match a drain-to-source voltage of the third transistor with a drain-to-source voltage of the second transistor;

a current mirror configured to mirror current flowing through the third transistor; and

a first resistor configured to convert the mirrored current to a current sensed signal.

2. The apparatus of claim 1, wherein the third transistor is configured to flow current from an output of the power converter.

3. The apparatus of claim 1, wherein the first circuit comprises:

a first amplifier having first and second inputs and an output, wherein the first input of the first amplifier is configured to receive a voltage corresponding to a voltage of a source of the second transistor, wherein the second input of the first amplifier is operatively coupled to the source of the third transistor; and

a fourth transistor having a gate, a drain, and a source, wherein the gate of the fourth transistor is operatively coupled to the output of the first amplifier, wherein the source of the fourth transistor is operatively coupled to the second input of the first amplifier in a feedback loop, and wherein the source of the fourth transistor is further operatively coupled to the source of the third transistor.

4. The apparatus of claim 3, wherein the fourth transistor is configured to flow current from an output of the power converter, wherein the current flowing through the third transistor includes at least a portion of the current flowing through the fourth transistor.

5. The apparatus of claim 3, wherein the current mirror comprises fifth and sixth transistors each having a gate, a drain, and a source, wherein the sources of the fifth and sixth transistors are configured to flow current from an output of the power converter, wherein the drain of the fifth transistor is operatively coupled to the drain of the fourth transistor, wherein the drain of the sixth transistor is operatively coupled to the first resistor, and wherein the gates of the fifth and sixth transistors are operatively coupled to the source of the fifth transistor such that the sixth transistor is configured to mirror current flowing through the fifth transistor.

6. The apparatus of claim 5, wherein the current sensing circuit further comprises a seventh transistor having a gate, a source, and a drain, wherein the gate of the seventh transistor is operative coupled to the output of the first amplifier, wherein the source of the seventh transistor is configured to receive a voltage corresponding to a voltage of the source of the fourth transistor, wherein the drain of the seventh transistor is operative coupled to the current mirror, and wherein the seventh transistor is a scaled version of the fourth transistor.

7. The apparatus of claim 6, wherein the current sensing circuit further comprises a second amplifier having first and second inputs and an output, wherein the first input of the second amplifier is operatively coupled to the drain of the fifth transistor and the drain of the seventh transistor, wherein the second input of the second amplifier is operatively coupled to the drain of the fourth transistor, wherein the output of the second amplifier is operatively coupled to the gate of the fifth transistor in a feedback loop.

8. The apparatus of claim 7, wherein the second amplifier is configured to match a voltage of the drain of the seventh transistor with a voltage of the drain of the fourth transistor.

9. The apparatus of claim 1, wherein the first circuit further comprises:

a first amplifier having first and second inputs and an output, wherein the first input of the first amplifier is configured to receive a voltage corresponding to a voltage of the source of the second transistor;

a fourth transistor having a gate, a drain, and a source, wherein the gate of the fourth transistor is operatively coupled to the output of the first amplifier, and wherein the drain is configured to flow current from an output of the power converter; and

second and third resistors each having first and second ends, wherein the first end of the second resistor is operatively coupled to a drain of the second transistor, wherein the second end of the second resistor is operatively coupled to the second input of the first amplifier, wherein the first end of the third resistor is operatively coupled to second end of the second resistor and the second input of the first amplifier, wherein the second end of the third resistor is operatively coupled to the drain of the third transistor, and wherein the second end of the third resistor is further operatively coupled to the source of the fourth transistor in a feedback loop.

10. The apparatus of claim 1, wherein the first circuit comprises:

a first amplifier having first and second inputs and an output, wherein the first input of the first amplifier is configured to receive a voltage corresponding to a voltage of a source of the second transistor;

a voltage divider having a first end, a second end, and an intermediate node, the first end operatively coupled to a drain of the second transistor, the second end operatively coupled to the drain of the third transistor, the intermediate node operatively coupled to the second input of the first amplifier; and

a fourth transistor having a gate, a drain, and a source, wherein the gate of the fourth transistor is operatively coupled to the output of the first amplifier, wherein the source of the fourth transistor is coupled to the second end of the voltage divider such that a voltage at the drain of the third transistor is equal in magnitude but opposite in polarity to a voltage of a drain of the second transistor.

11. The apparatus of claim 1, further comprising an offset current source configured to provide an offset current to the first resistor, and wherein the first resistor is configured to convert the offset current and the mirrored current to the current sensed signal.

12. The apparatus of claim 1, wherein the current sensed signal is a voltage signal.

13. A method of sensing a current of a power converter, the method comprising:

providing a gate of a sensing transistor with a voltage corresponding to a gate voltage of a power transistor of the power converter, wherein the sensing transistor is a scaled version of the power transistor;

controlling a drain-to-source voltage of the sensing transistor to match a drain-to-source voltage of the power transistor;

generating an output current based at least partly on current flowing through the sensing transistor by using a current mirror such that the output current is a scaled version of the current flowing through the sensing transistor; and

converting the output current to a current sensed signal by using a first resistor.

14. The method of claim 13, further comprising supplying the sensing transistor current from an output of the power converter.

15. The method of claim 13, wherein controlling the drain-to-source voltage comprises:

controlling a voltage of a source of the sensing transistor by providing a first circuit with a voltage corresponding to a voltage of a source of the power transistor, wherein the first circuit comprises a first amplifier and a third transistor, the first amplifier having first and second inputs and an output, the third transistor having a gate, a drain, and a source, wherein the first input of the first amplifier receives the voltage corresponding to the voltage of the source of the power transistor, wherein the second input of the first amplifier is operatively coupled to the source of the sensing transistor, wherein the gate of the third transistor is operatively coupled to the output of the first amplifier, and wherein the source of the third transistor is operatively coupled to the second input of the first amplifier and the source of the sensing transistor; and

supplying the third transistor current from an output the power converter.

16. The method of claim 13, wherein controlling the drain-to-source voltage comprises:

controlling a voltage of a source of the sensing transistor by providing a first circuit with a voltage corresponding to a voltage of a source of the power transistor, wherein the first circuit comprises a first amplifier, a voltage divider, and a third transistor, the first amplifier having first and second inputs and an output, the voltage divider having a first end, a second end, and an intermediate node, the third transistor having a gate, a drain, and a source, wherein the first input of the first amplifier is configured to receive the voltage corresponding to the voltage of the source of the power transistor, wherein the first end of the voltage divider is operatively coupled to a drain of the power transistor, wherein the second end of the voltage divider is operatively coupled to the drain of the third transistor, wherein the intermediate node of the voltage divider is operatively coupled to the second input of the first amplifier, wherein the gate of the third transistor is operatively coupled to the output of the first amplifier, wherein the source of the third transistor is coupled to the second end of the voltage divider such that a voltage at the drain of the sensing transistor is equal in magnitude but opposite in polarity to a voltage of a drain of the power transistor.

17. The method of claim 13, further comprising supplying current to the current mirror from an output of the power converter for providing at least a portion of the current flowing through the third transistor and for providing at least a portion of the mirrored current.

18. The method of claim 13, further comprising:

providing the first resistor an offset current by using an offset current source; and

converting the offset current to a component of the current sensed signal by using the first resistor.

19. The method of claim 13, wherein the current sensed signal is a voltage signal.

20. An apparatus for sensing a current of a power converter, the apparatus comprising:

means for providing a gate of a sensing transistor a voltage corresponding to a gate voltage of a power transistor of the power converter, wherein the sensing transistor is a scaled version of the power transistor;

means for controlling a drain-to-source voltage of the sensing transistor to match a drain-to-source voltage of the power transistor;

means for generating an output current based at least partly on current flowing through the sensing transistor, wherein the output-current generating means includes a current mirror such that the output current is a scaled version of the current flowing through the sensing transistor; and

means for converting the output current to a current sensed signal.