×

NOR-BASED BCAM/TCAM CELL AND ARRAY WITH NAND SCALABILITY

  • US 20140347933A1
  • Filed: 08/31/2013
  • Published: 11/27/2014
  • Est. Priority Date: 08/31/2012
  • Status: Active Grant
First Claim
Patent Images

1. A 2T-string NOR-based CAM logic cell circuit with NAND scalability, the 2T-string NOR-based CAM logic cell comprising:

  • a first NAND flash transistor connected a second NAND flash transistor in series, the first NAND flash transistor including a first gate coupled to a first word line and a drain node coupled to a vertical bit line, the second NAND flash transistor including a second gate coupled to a second word line and a source node coupled to a vertical source line, each of the first NAND flash transistor and the second NAND flash transistor being associated with at least a first threshold voltage level Vt0 of a negative value corresponding to a first physical state or a second threshold voltage level Vt1 of a positive value but smaller than power voltage level VDD corresponding to a second physical state;

    wherein the first NAND flash transistor and the second NAND flash transistor respectively corresponding to the first physical state and the second physical state define a first CAM logic state “

    0” and

    the first NAND flash transistor and the second NAND flash transistor being respectively associated with the second physical state and the first physical state define a second CAM logic state “

    1”

    , the first word line and the second word line are respectively at either ground voltage VSS=0V level or the complementary VDD level for performing a compare operation to determine if a single logic-bit match is found at either one of the first CAM logic state “

    0”

    or the second CAM logic state “

    1”

    when one of the first NAND flash transistor and the second NAND flash transistor is in non-conduction state.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×