Methods of Etching Trenches into Silicon of a Semiconductor Substrate, Methods of Forming Trench Isolation in Silicon of a Semiconductor Substrate, and Methods of Forming a Plurality of Diodes

• US 20140349487A1
• Filed: 08/07/2014
• Published: 11/27/2014
• Est. Priority Date: 12/03/2007
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Subramanian, Krupakar M.
• Granted Patent: US 9,524,875 B2
• Time in Patent Office: Days
• US Class Current: 438/701
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/3081 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/3083 characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/66136 PN junction diodes
• CPC Class Codes: H01L 29/8613 Mesa PN junction diodes

Abstract

A method of etching trenches into silicon of a semiconductor substrate includes forming a mask over silicon of a semiconductor substrate, with the mask comprising trenches formed there-through. Plasma etching is conducted to form trenches into the silicon of the semiconductor substrate using the mask. In one embodiment, the plasma etching includes forming an etching plasma using precursor gases which include SF₆, an oxygen-containing compound, and a nitrogen-containing compound. In one embodiment, the plasma etching includes an etching plasma which includes a sulfur-containing component, an oxygen-containing component, and NF_x.

Claims

1. A method of etching trenches into silicon of a semiconductor substrate, comprising:

forming a mask over silicon of a semiconductor substrate, the mask comprising trenches formed there-through; and

plasma etching trenches into the silicon of the semiconductor substrate using the mask, the plasma etching comprising an etching plasma comprising a sulfur-containing component, an oxygen-containing component, and NF_x.

2. The method of claim 1 the sulfur of the sulfur-containing component is formed from a precursor gas comprising SF₆.

3. The method of claim 1 wherein the oxygen of the oxygen-containing component is formed from a precursor gas comprising O₂, and the nitrogen of the NF_x is formed from a precursor gas compound which is void of oxygen.

4. The method of claim 1 wherein the oxygen of the oxygen-containing component and the nitrogen of the NF_x are formed from a precursor gas comprising NO_x.

5. The method of claim 1 wherein a layer of pad oxide is present between the hardmask and the silicon of the semiconductor substrate.

6. The method of claim 1 wherein a layer of silicon nitride is present between the hardmask and the silicon of the semiconductor substrate.

7. The method of claim 1 wherein a layer of polysilicon is present between the hardmask and the silicon of the semiconductor substrate.

8. The method of claim 1 wherein the etching plasma is formed by flowing the sulfur component at a flow rate of about 1 sccm to about 100 sccm, flowing the oxygen component at from about 10 sccm to about 500 sccm and flowing a nitrogen component at from about 1 sccm to about 500 sccm.

9. A method of etching trenches into silicon of a semiconductor substrate, comprising:

forming a mask over silicon of a semiconductor substrate, the mask comprising trenches formed there-through; and

plasma etching tapered trenches through at least two silicon-comprising material using the mask, the plasma etching comprising an etching plasma comprising a sulfur-containing component, an oxygen-containing component, and NF_x.

10. The method of claim 9 wherein the tapered trenches extend partially into a silicon substrate material.

11. The method of claim 9 further comprising forming the trenches formed through the mask utilizing anisotropic dry etching with an etch chemistry comprising SO₂, O₂ and optionally HBr.

12. The method of claim 9 further comprising forming the trenches formed through the mask utilizing anisotropic dry etching with an etch chemistry comprising O₂ and N₂.

13. The method of claim 9 further comprising forming the trenches formed through the mask utilizing anisotropic dry etching with an etch chemistry comprising CF₄, HBr and He.

14. The method of claim 9 wherein the mask comprises photoresist and at least one hardmask material.

15. The method of claim 9 wherein the mask comprises photoresist and an insulative hardmask material.

16. The method of claim 9 wherein the mask comprises photoresist and an antireflective layer.

17. The method of claim 9 wherein the mask comprises a pad oxide material, a material comprising at least one of polysilicon oxide and silicon nitride, a hardmasking material, an antireflective coating material and a photoresist.

18. The method of claim 9 wherein the at least two silicon-comprising are doped differently relative to one another.