BULK FINFET WITH CONTROLLED FIN HEIGHT AND HIGH-K LINER
First Claim
1. A semiconductor device comprising:
- a semiconductor substrate of a first semiconductor material;
a plurality of punch through doped semiconductor structures in contact with the semiconductor substrate, in which adjacent punch through doped semiconductor structures are separated from one another by a dielectric isolation material;
a plurality of fin structures of a second semiconductor material, wherein each fin structure of the plurality of fin structures is present on a punch through doped semiconductor structure of the plurality of punch through doped semiconductor structures, wherein said each fin structure of the plurality of fin structures has a substantially same height as measured from the surface of the semiconductor substrate; and
a gate structure present on a channel portion of said each fin structure of the plurality of fin structures.
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Abstract
A method of forming a semiconductor device that includes forming a material stack on a semiconductor substrate, the material stack including a first dielectric layer on the substrate, a second dielectric layer on the first dielectric layer, and a third dielectric layer on the second dielectric layer, wherein the second dielectric layer is a high-k dielectric. Openings are formed through the material stack to expose a surface of the semiconductor substrate. A semiconductor material is formed in the openings through the material stack. The first dielectric layer is removed selectively to the second dielectric layer and the semiconductor material. A gate structure is formed on a channel portion of the semiconductor material. In some embodiments, the method may provide a plurality of finFET or trigate semiconductor device in which the fin structures of those devices have substantially the same height.
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Citations
14 Claims
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1. A semiconductor device comprising:
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a semiconductor substrate of a first semiconductor material; a plurality of punch through doped semiconductor structures in contact with the semiconductor substrate, in which adjacent punch through doped semiconductor structures are separated from one another by a dielectric isolation material; a plurality of fin structures of a second semiconductor material, wherein each fin structure of the plurality of fin structures is present on a punch through doped semiconductor structure of the plurality of punch through doped semiconductor structures, wherein said each fin structure of the plurality of fin structures has a substantially same height as measured from the surface of the semiconductor substrate; and a gate structure present on a channel portion of said each fin structure of the plurality of fin structures. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification