AMPLIFIER AND METHOD OF AMPLIFYING A DIFFERENTIAL SIGNAL

• US 20140355790A1
• Filed: 05/29/2013
• Published: 12/04/2014
• Est. Priority Date: 05/29/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Georgi Panov
• Inventors: Zinke, Rinaldo, PANOV, Georgi
• Granted Patent: US 9,344,045 B2
• Time in Patent Office: Days
• US Class Current: 381/120
• CPC Class Codes: H03F 3/187 in integrated circuits
• CPC Class Codes: H03F 3/217 Class D power amplifiers; Switching amplifiers
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

An amplifier includes a differential input with a positive and a negative input and an analog integrator with a differential integrator input and a differential integrator output. The analog integrator further includes an operational amplifier with a positive operational amplifier input, a negative operational amplifier input, a positive operational amplifier output and a negative operational amplifier output. The differential integrator input is coupled to the differential input. A ternary pulse width modulator includes two modulator inputs coupled to the differential integrator output and two modulator outputs. A first feedback path is coupled between a first of the two modulator outputs and the positive operational amplifier input and a second feedback path is coupled between a second of the two modulator outputs and the negative operational amplifier input. A first divert capacitor is coupled between the positive operational amplifier input and a constant voltage reference. A second divert capacitor is coupled between the negative operational amplifier input and the constant voltage reference.

Claims

1. An amplifier, comprising:

a differential input comprising a positive input and a negative input;

an analog integrator comprising a differential integrator input and a differential integrator output, the analog integrator further comprising an operational amplifier, the operational amplifier comprising a positive operational amplifier input, a negative operational amplifier input, a positive operational amplifier output and a negative operational amplifier output, the differential integrator input being coupled to the differential input;

a ternary pulse width modulator comprising two modulator inputs coupled to the differential integrator output and two modulator outputs;

a first feedback path coupled between a first of the two modulator outputs and the positive operational amplifier input and a second feedback path coupled between a second of the two modulator outputs and the negative operational amplifier input; and

a first divert capacitor coupled between the positive operational amplifier input and a constant voltage reference, and a second divert capacitor coupled between the negative operational amplifier input and the constant voltage reference.

2. The amplifier of claim 1, wherein the first divert capacitor and the second divert capacitor have the same capacitance.

3. The amplifier of claim 1, wherein the first divert capacitor and the second divert capacitor have the same voltage dependency.

4. The amplifier of claim 1, wherein the first divert capacitor and the second divert capacitor have a capacitance value each comprised between 1 and 15 pF.

5. The amplifier of claim 1, wherein the constant voltage reference is an alternative current ground.

6. The amplifier of claim 1, wherein the constant voltage reference is ground.

7. The amplifier of claim 1, wherein the analog integrator is connected to a first voltage supply, and the ternary pulse width modulator is connected to a second voltage supply, the first voltage being smaller than the second voltage.

8. The amplifier of claim 7, wherein the first voltage is comprised between 1 and 2.5 Volts.

9. The amplifier of claim 1, wherein the analog integrator is of n^th-order, n being an integer greater than one.

10. The amplifier of claim 1, wherein the ternary pulse width modulator comprises two comparators and a triangular signal generator, each comparator comprising a positive comparator input and a negative comparator input, the positive comparator inputs being coupled to the two modulator inputs, respectively, and the negative comparator inputs being coupled to an output of the triangular signal generator.

11. The amplifier of claim 10, wherein the triangular signal generator is configured to generate a periodic triangular signal with a frequency comprised between 300 kHz and 2 MHz.

12. The amplifier of claim 1, wherein the amplifier is comprised in an audio system comprising a loudspeaker coupled between the two modulator outputs.

13. The amplifier of claim 1, wherein the amplifier is comprised in a mobile device comprising a loudspeaker coupled between the two modulator outputs.

14. A method of amplifying a differential signal, comprising:

providing a differential input signal to be amplified, the differential input signal comprising two complementary signals;

integrating the complementary input signals;

modulating the integrated complementary input signals to form a ternary pulse width modulated signal at a differential output;

feeding back a signal from a first output of the differential output and feeding back a signal from a second output of the differential output separately; and

diverting equal parts of the first feedback signal and the second feedback signal to a constant voltage reference via a first divert capacitor and a second divert capacitor, respectively.

15. The method of claim 14, wherein modulating the integrated complementary input signals comprises comparing a first of the integrated complementary input signals to a periodic triangular signal and comparing a second of the integrated complementary input signals to the triangular signal.

16. A Class-D amplifier, comprising:

a loop filter comprising an operational amplifier, the operational amplifier comprising a positive operational amplifier input and a negative operational amplifier input; and

a pair of matched divert capacitors coupled between the positive operational amplifier input and the negative operational amplifier input, respectively, and a constant voltage reference, the divert capacitors being configured to protect the operational amplifier from common-mode feedback signals.

17. The Class-D amplifier of claim 16, wherein the loop filter is of n^th-order, n being an integer greater than one, and the pair of matched divert capacitors have a value each comprised between 1 and 5 pF.

18. A differential amplifier, comprising:

a first signal input configured to receive an analog input signal;

a second signal input configured to receive the inverse analog input signal;

an analog integrator coupled to receive the analog input signal and the inverse analog input signal;

a first signal output configured to output the analog input signal in a pulse width modulated form;

a second signal output configured to output the inverse analog input signal in a pulse width modulated form;

a first feedback path coupled to feed the pulse width modulated analog input signal back to the analog integrator as a first feedback signal;

a second feedback path coupled to feed the pulse width modulated analog inverse analog input signal back to the analog integrator as a second feedback signal; and

a pair of matched divert capacitors, one of the capacitors coupled between the first feedback path and a constant voltage reference to divert part of the first feedback signal, and the other of the capacitors coupled between the second feedback path and the constant voltage reference to divert part of the second feedback signal.

19. The differential amplifier of claim 18, further comprising a differential pulse width modulator coupled between the analog integrator and the first and second signal outputs.