Independent Management of Data and Parity Logical Block Addresses
First Claim
1. An apparatus, comprising:
- an interface configured to receive at least application data for storage in a memory; and
a processor configured to;
identify, in a set of data items associated with respective logical addresses for storage in the memory, a first subset of the logical addresses associated with the data items that include the application data;
identify a second subset of the logical addresses with the data items containing parity information that has been calculated over the application data;
store data items associated with the first subset in first physical areas of the memory;
store data items associated with the second identified subset in second physical memory areas of the memory, wherein the second physical areas of the memory are different from the first physical areas of the memory; and
perform a memory management task independently in the first physical areas of the memory and in the second physical areas of the memory.
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Abstract
A data storage method includes identifying, in a set of data items associated with respective logical addresses for storage in a memory, a first subset of the logical addresses associated with the data items containing application data, and a second subset of the logical addresses associated with the data items containing parity information that has been calculated over the application data. The data items associated with the first identified subset are stored in one or more first physical memory areas of the memory, and the data items associated with the second identified subset are stored in one or more second physical memory areas of the memory, different from the first physical memory areas. A memory management task is performed independently in the first physical memory areas and in the second physical memory areas.
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Citations
20 Claims
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1. An apparatus, comprising:
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an interface configured to receive at least application data for storage in a memory; and a processor configured to; identify, in a set of data items associated with respective logical addresses for storage in the memory, a first subset of the logical addresses associated with the data items that include the application data; identify a second subset of the logical addresses with the data items containing parity information that has been calculated over the application data; store data items associated with the first subset in first physical areas of the memory; store data items associated with the second identified subset in second physical memory areas of the memory, wherein the second physical areas of the memory are different from the first physical areas of the memory; and perform a memory management task independently in the first physical areas of the memory and in the second physical areas of the memory. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method, comprising:
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receiving, by a controller, a plurality of data items and a respective plurality of logical addresses, wherein the plurality of data items includes a plurality of application data items and a plurality of parity data items; identifying, by the controller, a first subset of the plurality of logical addresses and a second subset of the plurality of logical addresses dependent upon one or more parameters, wherein each logical address of the first subset of the plurality of logical addresses corresponds to a respective application data items of the plurality of application data items, and wherein each logical address of the second subset of the plurality of logical addresses corresponds to a respective parity data item of the plurality of parity data items; storing, by the controller, each application data item of the plurality of application data items in a first portion of a memory dependent upon the first subset of the plurality of logical addresses; and storing, by the controller, each parity data item of the plurality of data items in a second portion of the memory dependent upon the second subset of the plurality of logical addresses. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. An apparatus, comprising:
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a memory; and a processor configured to; receive a plurality of data items and a respective plurality of logical addresses, wherein the plurality of data items includes a plurality of application data items and a plurality of parity data items; identify a first subset of the plurality of logical addresses and a second subset of the plurality of logical addresses dependent upon one or more parameters, wherein each logical address of the first subset of the plurality of logical addresses corresponds to a respective application data items of the plurality of application data items, and wherein each logical address of the second subset of the plurality of logical addresses corresponds to a respective parity data item of the plurality of parity data items; store each application data item of the plurality of application data items in a first portion of the memory dependent upon the first subset of the plurality of logical addresses; and store each parity data item of the plurality of data items in a second portion of the memory dependent upon the second subset of the plurality of logical addresses. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification