ARRAY SUBSTRATE AND ORGANIC LIGHT-EMITTING DISPLAY INCLUDING THE SAME
First Claim
1. An array substrate comprising:
- a substrate;
a barrier layer disposed on the substrate;
a buffer layer disposed on the barrier layer;
a first insulating layer disposed on the buffer layer;
a second insulating layer disposed on the first insulating layer;
a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer, and wherein the wiring patterns are separated from each other, and extend toward a side of the substrate,a recess pattern disposed adjacent to the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of the top surface of the substrate; and
an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the substrate which is exposed by the recess pattern.
1 Assignment
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Accused Products
Abstract
An array substrate includes a substrate, a barrier layer disposed on the substrate, a buffer layer disposed on the barrier layer, a first insulating layer disposed on the buffer layer, a second insulating layer disposed on the first insulating layer, a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer. In addition, the wiring patterns are separated from each other, and extend toward a side of the substrate. The array substrate further includes a recess pattern disposed adjacent the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of a top surface of the substrate, and an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the substrate which is exposed by the recess pattern.
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Citations
40 Claims
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1. An array substrate comprising:
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a substrate; a barrier layer disposed on the substrate; a buffer layer disposed on the barrier layer; a first insulating layer disposed on the buffer layer; a second insulating layer disposed on the first insulating layer; a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer, and wherein the wiring patterns are separated from each other, and extend toward a side of the substrate, a recess pattern disposed adjacent to the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of the top surface of the substrate; and an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the substrate which is exposed by the recess pattern. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. An array substrate having a display area and a non-display area which is located outside the display area, wherein the non-display area comprises:
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a substrate; a barrier layer which is disposed on the substrate; a buffer layer which is disposed on the barrier layer; a first insulating layer which is disposed on the buffer layer; a second insulating layer which is disposed on the first insulating layer; a plurality of wiring patterns which are disposed between the first insulating layer and the second insulating layer or on the second insulating layer, are separated from each other, and extend toward a side of the substrate; a recess pattern which is disposed adjacent to the wiring patterns and is recessed from a top surface of the second insulating layer by a predetermined depth to expose at least part of the top surface of the substrate; and an organic insulating layer which is disposed on the second insulating layer and exposes at least part of a portion of the top surface of the substrate which is exposed by the recess pattern. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 39)
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37. An organic light-emitting display (OLED) comprising:
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an array substrate comprising a display area and a non-display area located outside the display area; and an encapsulation member disposed on the array substrate, wherein the non-display area of the array substrate comprises; a substrate, a barrier layer disposed on the substrate, a buffer layer disposed on the barrier layer, a first insulating layer disposed on the buffer layer, a second insulating layer disposed on the first insulating layer, a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer, and wherein the wiring patterns are separated from each other, and extend toward a side of the substrate, a recess pattern disposed adjacent to the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of the top surface of the substrate, and an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the substrate which is exposed by the recess pattern. - View Dependent Claims (38)
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40. An organic light-emitting display (OLED) comprising:
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an array substrate comprising a display area, and a non-display area disposed outside the display area; and an encapsulation member disposed on the array substrate, wherein the display area comprises; a display area substrate, a display area barrier layer disposed on the display area substrate, a display area buffer layer disposed on the display area barrier layer, a semiconductor layer disposed on the display area buffer layer, a gate insulating layer disposed on the semiconductor layer, a gate wiring including a gate line, a gate electrode and a gate pad disposed on the gate insulating layer, an interlayer insulating film covering the gate wiring, a data wiring including a source electrode, a drain electrode, and a data line disposed on the interlayer insulating film, a planarization layer disposed on the data wiring and the interlayer insulating film, a first electrode disposed on the planarization layer and electrically connected to the drain electrode, a pixel defining layer disposed on the first electrode and exposing a portion of the first electrode, an organic layer disposed on the portion of the first electrode exposed by the pixel defining layer, and a second electrode disposed on the organic layer and the pixel defining layer, and wherein the non-display area comprises; a non-display area substrate, a non-display area barrier layer disposed on the non-display area substrate, a non-display area buffer layer disposed on the non-display area barrier layer, a first insulating layer disposed on the non-display area buffer layer, a second insulating layer disposed on the first insulating layer, a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer, and wherein the wiring patterns are separated from each other, and extend toward a side of the non-display area substrate; a recess pattern disposed adjacent to the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of the top surface of the non-display area substrate, and an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the non-display area substrate which is exposed by the recess pattern.
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Specification