Power Semiconductor Device with Contiguous Gate Trenches and Offset Source Trenches
First Claim
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1. A power semiconductor device comprising:
- a plurality of source trenches adjacent to a plurality of source regions;
said plurality of source trenches extending from a top surface of a semiconductor substrate into said semiconductor substrate,a plurality of gate trenches extending from said top surface into said semiconductor substrate, said plurality of gate trenches forming hexagonal patterns;
a contiguous formation of said plurality of gate trenches separating said plurality of source trenches from one another.
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Abstract
Disclosed is a power semiconductor device that includes a plurality of source trenches and adjacent source regions. The plurality of source trenches extend from a top surface of a semiconductor substrate into the semiconductor substrate. The power semiconductor device further includes a plurality of gate trenches that extend from the top of the semiconductor substrate into the semiconductor substrate, and are arranged in hexagonal or zigzag patterns. A contiguous formation is created by the plurality of gate trenches, and the plurality of gate trenches separate the plurality of source trenches from one another.
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Citations
20 Claims
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1. A power semiconductor device comprising:
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a plurality of source trenches adjacent to a plurality of source regions; said plurality of source trenches extending from a top surface of a semiconductor substrate into said semiconductor substrate, a plurality of gate trenches extending from said top surface into said semiconductor substrate, said plurality of gate trenches forming hexagonal patterns; a contiguous formation of said plurality of gate trenches separating said plurality of source trenches from one another. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A power semiconductor device comprising:
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a plurality of source trenches adjacent to a plurality of source regions; said plurality of source trenches extending from a top surface of a semiconductor substrate into said semiconductor substrate, a plurality of gate trenches extending from said top surface into said semiconductor substrate, said plurality of gate trenches forming zigzag patterns; a contiguous formation of said plurality of gate trenches separating said plurality of source trenches from one another. - View Dependent Claims (12, 13, 14)
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15. A power semiconductor device comprising:
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a plurality of source trenches adjacent to a plurality of source regions, said plurality of source trenches being offset from one another; said plurality of source trenches extending from a top surface of a semiconductor substrate into said semiconductor substrate; a plurality of gate trenches extending from said top surface into said semiconductor substrate; a contiguous formation of said plurality of gate trenches separating said plurality of source trenches from one another. - View Dependent Claims (16, 17, 18)
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19. A semiconductor device comprising:
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a plurality of shield electrode trenches, wherein each of said plurality of shield electrode trenches is substantially equally spaced from each adjacent shield electrode trench; said plurality of shield electrode trenches extending from a top surface of a semiconductor substrate into said semiconductor substrate; a respective shield electrode trench dielectric lining each of said plurality of shield electrode trenches; a respective shield electrode adjacent said respective shield electrode trench dielectric and within each of said plurality of shield electrode trenches. - View Dependent Claims (20)
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Specification