Controlled Buckling Structures in Semiconductor Interconnects and Nanomembranes for Stretchable Electronics

• US 20140374872A1
• Filed: 03/20/2014
• Published: 12/25/2014
• Est. Priority Date: 06/04/2004
• Status: Active Grant

• Current Assignee: Board of Trustees of The University of Illinois
• Original Assignee: Board of Trustees of The University of Illinois
• Inventors: ROGERS, John A., MEITL, Matthew, SUN, Yugang, KO, Heung Cho, STOYKOVICH, Mark, HUANG, Yonggang, NUZZO, Ralph G., ZHU, Zhengtao, MENARD, Etienne, KHANG, Dahl-Young, CARLSON, Andrew, CHOI, Won Mook, JIANG, Hanqing
• Granted Patent: US 9,324,733 B2
• Time in Patent Office: Days
• US Class Current: 257/499
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02628 using solutions
• CPC Class Codes: H01L 21/4846 Leads on or in insulating or insulated substrates, e.g. metallisation H01L21/4821 takes precedence; metallisation of ceramics in general C04B41/51; printed circuits H05K3/00
• CPC Class Codes: H01L 21/8258 the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/72 Transistor-type devices, i.e. able to continuously respond to applied control signals
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H05K 1/0283 Stretchable printed circuits
• CPC Class Codes: H05K 2201/0133 Elastomeric or compliant polymer elastomeric conductor H05K2201/0314
• CPC Class Codes: H05K 2201/09045 Locally raised area or protrusion of insulating substrate rigid curved substrate H05K2201/09018
• CPC Class Codes: H05K 2203/0271 Mechanical force other than pressure, e.g. shearing or pulling
• CPC Class Codes: H05K 3/20 by affixing prefabricated conductor pattern H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence
• CPC Class Codes: H05K 3/22 Secondary treatment of printed circuits H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.

Abstract

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Claims

1. (canceled)

2. A flexible multilayer device comprising:

a flexible substrate;

an intermediate layer that is at least partially supported on a surface of the flexible substrate;

a first device layer disposed over the flexible substrate and at least partially embedded in the intermediate layer, the first device layer comprising;

a first device component; and

at least one first stretchable semiconductor structure;

an interlayer disposed over the first device layer, the interlayer comprising a polymeric material;

a second device layer disposed over the interlayer, the second device layer comprising a second device component; and

an electrical interconnect having a first end and the second end, the electrical interconnect extending through a portion of the interlayer,

wherein the first end of the interlayer is in electrical communication with the first device component, and

wherein the second end of the interlayer is in electrical communication with the second device component.

3. The flexible multilayer device of claim 2, wherein the interlayer has a thickness of about 500 nm, about 1.0 microns, or about 1.5 microns.

4. The flexible multilayer device of claim 2, wherein the interlayer has a thickness of less than or equal to about 1.5 microns.

5. The flexible multilayer device of claim 2, wherein the interlayer comprises a polyimide.

6. The flexible multilayer device of claim 2, wherein the first device component is spatially aligned with at least a portion of the second device component.

7. The flexible multilayer device of claim 2, further comprising an encapsulating layer, wherein the encapsulating layer at least partially encapsulates the second device layer.

8. The flexible multilayer device of claim 7, wherein the second device layer further comprises at least one second stretchable semiconductor structure in electrical communication with the second device component.

9. The flexible multilayer device of claim 8, wherein the encapsulating layer at least partially encapsulates at least one of:

the second device component, and

the at least one second stretchable semiconductor structure.

10. The flexible multilayer device of claim 7, wherein the encapsulating layer comprises at least one of a polyimide and a polyurethane.

11. The flexible multilayer device of claim 2, wherein the flexible substrate comprises an elastomer.

12. The flexible multilayer device of claim 2, wherein the at least one first stretchable semiconductor structure is at least partially embedded in the intermediate layer.

13. The flexible multilayer device of claim 2, wherein the at least one first stretchable semiconductor structure is a plurality of stretchable semiconductor structures arranged in an array or pattern.

14. The flexible multilayer device of claim 13, wherein the pattern is a grid configuration, a floral configuration, a bridge configuration, or any combination thereof.

15. The flexible multilayer device of claim 2, wherein at least one of the first device component and the second device component comprises a material selected from the group consisting of:

single crystal silicon, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, SiGe, GaInAsP, and a carbon nanomaterial.

16. The flexible multilayer device of claim 2, wherein at least one of the first device component and the second device component comprises an electronic device, an array of electronic device, an optical device, an opto-electronic device, a microfluidic device, a microelectromechanical system, a nanoelectromechanical system, a thermal device, a sensor, an integrated circuit, a microprocessor, a memory device, or any combination thereof.

17. The flexible multilayer device of claim 2, wherein the at least one first stretchable semiconductor structure has a coiled conformation, a wrinkled conformation, a buckled conformation, or a wavy configuration.

18. The flexible multilayer device of claim 2, wherein the at least one first stretchable semiconductor structure is in electrical communication with the first device component.

19. A flexible multilayer device comprising:

a flexible substrate;

an intermediate layer that is at least partially supported on a surface of the flexible substrate;

a first device layer disposed over the flexible substrate and at least partially embedded in the intermediate layer, the first device layer comprising;

a first device component; and

at least two first stretchable semiconductor structures,

wherein the at least two first stretchable semiconductor structures extend along at least two different directions from the first device component in a plane of the first device layer to form a two-dimensional array;

an interlayer disposed over the first device layer, the interlayer comprising a polymeric material;

a second device layer disposed over the interlayer, the second device layer comprising a second device component; and

an electrical interconnect having a first end and the second end, the electrical interconnect extending through a portion of the interlayer,

wherein the first end of the interlayer is in electrical communication with the first device component, and

wherein the second end of the interlayer is in electrical communication with the second device component.

20. The flexible multilayer device of claim 19, further comprising an encapsulating layer, wherein the encapsulating layer at least partially encapsulates the second device layer.

21. The flexible multilayer device of claim 19, wherein the flexible substrate comprises an elastomer.

22. The flexible multilayer device of claim 19, wherein one or more of the least two first stretchable semiconductor structures is at least partially embedded in the intermediate layer.

23. The flexible multilayer device of claim 19, wherein the at least two first stretchable semiconductor structures in the two-dimensional array are arranged in a grid configuration, a floral configuration, a bridge configuration, or any combination thereof.

24. The flexible multilayer device of claim 19, wherein at least one of the first device component and the second device component comprises a material selected from the group consisting of:

single crystal silicon, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, SiGe, GaInAsP, and a carbon nanomaterial.

25. The flexible multilayer device of claim 19, wherein at least one of the first device component and the second device component comprises an electronic device, an array of electronic device, an optical device, an opto-electronic device, a microfluidic device, a microelectromechanical system, a nanoelectromechanical system, a thermal device, a sensor, an integrated circuit, a microprocessor, a memory device, or any combination thereof.

26. The flexible multilayer device of claim 19, wherein the at least two first stretchable semiconductor structures have a coiled conformation, a wrinkled conformation, a buckled conformation, or a wavy configuration.

27. The flexible multilayer device of claim 19, wherein the at least two first stretchable semiconductor structures are in electrical communication with the first device component.

28. A method for making a multilayer device, said method comprising the steps of:

providing a substrate pre-patterned with one or more device components supported by a receiving surface of the substrate;

assembling a first set of printable semiconductor elements on said substrate by contact printing said printable semiconductor elements onto said receiving surface of the substrate or one or more structures provided thereon, thereby generating a first device layer;

providing an interlayer on said first set of printable semiconductor elements, said interlayer having a receiving surface; and

assembling a second set of printable semiconductor elements on said interlayer by contact printing said printable semiconductor elements onto said receiving surface of the interlayer or one or more structures provided thereon, thereby generating a second device layer.

29. The method of claim 28 wherein at least a portion of said printable semiconductor elements in said first device layer are spatially aligned, in electrical contact or both with at least a portion of said printable semiconductor elements in said second device layer

30. The method of claim 28 further comprising the step of establishing electrical contact between at least a portion of said printable semiconductor elements in said first device layer and at least a portion of said printable semiconductor elements in said second device layer.