SEMICONDUCTOR DEVICE INTEGRATING A VOLTAGE DIVIDER AND PROCESS FOR MANUFACTURING A SEMICONDUCTOR DEVICE

• US 20150001677A1
• Filed: 06/19/2014
• Published: 01/01/2015
• Est. Priority Date: 06/28/2013
• Status: Active Grant

• Current Assignee: STMicroelectronics International N.V. (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Palumbo, Vincenzo, Venturato, Mirko
• Granted Patent: US 9,461,104 B2
• Time in Patent Office: Days
• US Class Current: 257/536
• CPC Class Codes: G01R 15/04 Voltage dividers
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5228 Resistive arrangements or effects of, or between, wiring layers other resistive arrangements H01L23/647
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/405 Resistive arrangements, e.g. resistive or semi-insulating field plates
• CPC Class Codes: H01L 29/66681 Lateral DMOS transistors, i.e. LDMOS transistors
• CPC Class Codes: H01L 29/7817 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes: a semiconductor substrate; a high-voltage first resistive structure which extends along a spiral path above the substrate and is separated from the substrate by a first dielectric layer; and a conductive shielding structure, including a plurality of first shielding strips, which are arranged in sequence along respective portions of the first resistive structure and are separated from the first resistive structure by a second dielectric layer.

Claims

1. A semiconductor device comprising:

a semiconductor substrate;

a high-voltage first resistive structure extending along a spiral path above the substrate and separated from the substrate by a first dielectric layer; and

a conductive shielding structure, comprising a plurality of first shielding strips arranged in sequence along respective portions of the first resistive structure and separated from the first resistive structure by a second dielectric layer.

2. Semiconductor device according to claim 1, wherein the first shielding strips are electrically coupled to respective portions of the first resistive structure by plugs arranged through the second dielectric layer.

3. Semiconductor device according to claim 2, comprising ohmic contact regions in positions corresponding to respective plugs.

4. Semiconductor device according to claim 1, wherein the first shielding strips are not directly in contact with one another.

5. Semiconductor device according to claim 1, wherein the first shielding strips are coplanar with one another and parallel to the first resistive structure.

6. Semiconductor device according to claim 1, wherein the first resistive structure comprises a semiconductor strip extending along the spiral path.

7. Semiconductor device according to claim 4, wherein the first shielding strips have a width substantially equal to a width of the semiconductor strip forming the first resistive structure.

8. Semiconductor device according to claim 1, wherein each first shielding strip extends over an angle not greater than 10°

, for example, less than 6°

.

9. Semiconductor device according to claim 1, comprising a second resistive structure extending along a spiral path above the substrate, separated from the substrate by the first dielectric layer and concentric to the first resistive structure;

and wherein the shielding structure, comprises a plurality of second shielding strips arranged in sequence along respective portions of the second resistive structure and separated from the second resistive structure by the second dielectric layer.

10. Semiconductor device according to claim 9, wherein the second shielding strips are electrically coupled to respective portions of the second resistive structure by further plugs arranged through the second dielectric layer.

11. Semiconductor device according to claim 9, wherein the second shielding strips are not directly in contact with one another and with the first shielding strips.

12. Semiconductor device according to claim 1, wherein the first resistive structure has a first terminal, a second terminal and an outlet node and comprises a first resistor between the first terminal and the outlet node, and a second resistor, between the second terminal and the outlet node, the first resistor and the second resistor forming a voltage divider.

13. Semiconductor device according to claim 12, comprising a supply line, the first resistive structure being coupled between terminals of the supply line.

14. Semiconductor device according to claim 13, comprising a power component in the substrate in a region corresponding to the first resistive structure, the power component having conduction terminals coupled to the first resistive structure.

15. Process for manufacturing a semiconductor device comprising:

forming a first dielectric layer on a semiconductor substrate;

forming, on the first dielectric layer, a resistive structure extending along a spiral path;

forming a second dielectric layer on the first dielectric layer, so as to incorporate the resistive structure; and

forming a conductive shielding structure, comprising a plurality of shielding strips arranged in sequence along respective portions of the resistive structure.

16. Process according to claim 15, comprising performing an annealing after having formed the shielding structure.

17. Process according to claim 16, wherein performing an annealing comprises using forming gas.

18. Process according to claim 15, wherein forming the shielding structure comprises:

forming, in the second dielectric layer, apertures exposing respective portions of the resistive structure;

filling the apertures with conductive material;

depositing a metallic layer in contact with the conductive material in the apertures; and

shaping the metallic layer so as to obtain the shielding strips.