ELLIPTICITY REDUCTION IN CIRCULARLY POLARIZED ARRAY ANTENNAS

• US 20150002335A1
• Filed: 06/26/2014
• Published: 01/01/2015
• Est. Priority Date: 06/28/2013
• Status: Active Grant

• Current Assignee: Mimosa Networks, Inc. (Airspan Networks Inc.)
• Original Assignee: Mimosa Networks, Inc. (Airspan Networks Inc.)
• Inventors: Hinman, Brian, Eberhardt, Paul
• Granted Patent: US 10,938,110 B2
• Time in Patent Office: Days
• US Class Current: 342/365
• CPC Class Codes: H01Q 11/08 Helical antennas
• CPC Class Codes: H01Q 21/20 the units being spaced along or adjacent to a curvilinear path slotted waveguide arrays H01Q21/005; circularly or helically slotted waveguides H01Q21/0062
• CPC Class Codes: H01Q 21/24 Combinations of antenna units polarised in different directions for transmitting or receiving circularly and elliptically polarised waves or waves linearly polarised in any direction circularly polarised patch antennas H01Q9/0428; circularly polarised horns H01Q13/0241; cross-polarised horns H01Q13/0258; polarisation converters H01Q15/242; cross-polarised rear feeds H01Q19/136; crossed polarisation dual antenna H01Q25/001

Abstract

Ellipticity reduction in circularly polarized array antennas is provided herein. An antenna array may include a processor that is configured to control a plurality of elements, each of the plurality of elements producing an elliptically polarized wave having an eccentricity value, the elliptically polarized wave traveling along a direction of propagation, wherein at least a portion of the plurality of elements are incrementally clocked around their direction of propagation, so that a combined output of the plurality of elements is substantially circularly polarized.

Claims

1. An antenna array, comprising:

a plurality of elements, each of the plurality of elements producing an elliptically polarized wave having an eccentricity value, the elliptically polarized wave traveling along a direction of propagation, wherein at least a portion of the plurality of elements are incrementally clocked around their direction of propagation, so that a combined output of the plurality of elements is substantially circularly polarized.

2. The antenna array according to claim 1, wherein the means for compensating for a phase shift in the combined output comprises the processor executing phase shift logic stored in memory to modify the combined output of the plurality of elements to remove or reduce the phase shift.

3. The antenna array according to claim 1, wherein the means for compensating for a phase shift in the combined output comprises the processor controlling a capacitor or an inductor to modify the combined output of the plurality of elements to remove or reduce the phase shift, the capacitor or inductor being electrically coupled to the plurality of elements.

4. The antenna array according to claim 1, wherein the processor further executes the instructions to detect the phase shift in the combined output.

5. The antenna array according to claim 4, further comprising a means for compensating for a phase shift in the combined output, caused by clocking of the plurality of elements.

6. A wireless device, comprising an antenna array, the antenna array comprising a plurality of elements, each of the plurality of elements producing an elliptically polarized wave having a polarization vector that is perpendicular to a major access of the elliptically polarized wave, at least a portion of the plurality of elements being incrementally clocked relative to one another such that an ellipticity of a combined output of the antenna array is reduced.

7. The wireless device according to claim 6, wherein the wireless device is a single user multiple-input-multiple-output device.

8. The wireless device according to claim 6, wherein the wireless device is a multiple user multiple-input-multiple-output device.

9. A method executed within a wireless device that comprises a processor and a memory, the processor executing the instructions stored in memory to perform the method, comprising:

controlling each of a plurality of elements, wherein each of the plurality of elements producing an elliptically polarized wave having an eccentricity value, the elliptically polarized wave traveling along a direction of propagation, wherein at least a portion of the plurality of elements are incrementally clocked around their direction of propagation, so that a combined output of the plurality of elements is substantially circularly polarized.

10. The method according to claim 9, further comprising:

detecting a phase shift in the combined output; and

compensating for a phase shift by executing phase shift logic stored in memory to modify the combined output of the plurality of elements to remove or reduce the phase shift.

11. The method according to claim 10, wherein compensating for a phase shift comprises controlling, by the processor, a capacitor or an inductor to modify the combined output of the plurality of elements to remove or reduce the phase shift, the capacitor or inductor being electrically coupled to the plurality of elements.

12. The method according to claim 9, further comprising compensating for a phase shift present in the combined output, caused by clocking of the plurality of elements using a compensating line length in a feed of each of the plurality of elements.

13. An antenna, comprising:

a processor; and

a memory for storing executable instructions, the processor executing the instructions stored in memory to;

control a plurality of elements, each of the plurality of elements producing an elliptically polarized wave having an eccentricity value, the elliptically polarized wave traveling along a direction of propagation, wherein at least a portion of the plurality of elements are incrementally clocked around their direction of propagation, so that a combined output of the plurality of elements is substantially circularly polarized, wherein each of the plurality of elements;

is associated with a feed; and

comprises a compensating line length in the feed that compensates for a phase shift present in the combined output, caused by clocking of the plurality of elements.

14. The antenna according to claim 13, wherein the processor induces a compensation by executing phase shift logic stored in memory to modify the combined output of the plurality of elements to remove or reduce the phase shift.

15. The antenna according to claim 14, wherein the processor induces a compensation by controlling a capacitor or an inductor to modify the combined output of the plurality of elements to remove or reduce the phase shift, the capacitor or inductor being electrically coupled to the plurality of elements.