POWER MANAGEMENT IN MULTI-DIE ASSEMBLIES

• US 20150003181A1
• Filed: 06/26/2013
• Published: 01/01/2015
• Est. Priority Date: 06/26/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Droege, Guido, Schaefer, Andre, Zillmann, Uwe
• Granted Patent: US 9,391,453 B2
• Time in Patent Office: Days
• US Class Current: 365/226
• CPC Class Codes: G05F 1/618 using semiconductor devices in series and in parallel with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G11C 5/025 Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device geometrical lay-out of the components in integrated circuits, H01L27/0207
• CPC Class Codes: G11C 5/14 Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence
• CPC Class Codes: G11C 7/00 Arrangements for writing information into, or reading information out from, a digital store G11C5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C11/4063, G11C11/413
• CPC Class Codes: H01L 2924/19042 being an inductor
• CPC Class Codes: H01L 2924/19104 on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices

Abstract

An apparatus such as heterogeneous device includes at least a first die and a second die. The apparatus further includes a first inductive element, a second inductive element, and switch control circuitry. The switch control circuitry is disposed in the first die. The switch control circuitry controls current through the first inductive element to produce a first voltage. The first voltage powers the first die. The second inductive element is coupled to the first inductive element. The second inductive element produces a second voltage to power the second die. The first die and second die can be fabricated in accordance with different technologies and in which the first die and second die withstand different maximum voltages. A magnitude of the first voltage can be greater than a magnitude of the second voltage.

Claims

1. An apparatus comprising:

a first inductive element and a second inductive element;

a plurality of die;

switch control circuitry, the switch control circuitry disposed in a first die of the apparatus, the switch control circuitry controlling current through a first inductive element to produce a first voltage; and

the second inductive element coupled to receive the first voltage and produce a second voltage, the second voltage powering a second die in the apparatus.

2. The apparatus as in claim 1, wherein the first inductive element is magnetically coupled to the second inductive element.

3. The apparatus as in claim 1, wherein the first voltage powers the first die;

wherein the first inductive element and the second inductive element are disposed on the first die; and

wherein a magnitude of the second voltage is greater than a magnitude of the first voltage.

4. The apparatus as in claim 2, wherein the second die is stacked on the first die;

and

wherein a magnitude of the second voltage is greater than a magnitude of the first voltage.

5. The apparatus as in claim 1, wherein the first die includes a set of storage cells, the set of storage cells in the first die storing first data;

and

wherein the second die includes a set of storage cells, the set of storage cells in the second die storing second data.

6. The apparatus as in claim 1, wherein the first inductive element and the second inductive element are disposed in the first die.

7. The apparatus as in claim 1, wherein the first die and the second die are disposed in a vertical memory stack in which a planar facing of the first die is substantially in contact with a planar facing of the second die, the apparatus further comprising:

a conductive link extending from the first die to the second die, the conductive link conveying the second voltage from the second inductive element to a diode disposed in the second die.

8. The apparatus as in claim 7, wherein the conductive link conveys the second voltage from an output node of the second inductive element to an anode of the diode.

9. The apparatus as in claim 1, wherein a first node of the first inductive element is coupled to an input voltage, the input voltage providing the current through the first inductive element;

and

wherein a magnitude of the first voltage is greater than a magnitude of the input voltage.

10. The apparatus as in claim 1 further comprising:

a host substrate, the first die and the second die disposed adjacent to each other on a facing of the host substrate; and

a conductive link extending on the facing of the host substrate from the first die to the second die, the conductive link conveying the second voltage from the second inductive element to a diode disposed in the second die.

11. The apparatus as in claim 10, wherein the first inductive element and the second inductive element are disposed on the host substrate.

12. The apparatus as in claim 1, wherein the first die is a first DRAM (Dynamic Random Access Memory) device;

and

wherein the second die is a second DRAM (Dynamic Random Access Memory) device.

13. The apparatus as in claim 1, wherein a magnitude of the second voltage is greater than a magnitude of the first voltage;

wherein the first die includes a first set of semiconductor components, the first set of semiconductor components fabricated in accordance with a first fabrication technology, the semiconductor components in the first set tolerable of application of a first maximum threshold voltage;

wherein the second die includes a second set of semiconductor components, the second set of semiconductor components fabricated in accordance with a second fabrication technology, the semiconductor components in the second set tolerable of application of a second maximum threshold voltage;

wherein the magnitude of the first voltage is less than the first maximum threshold voltage;

wherein the magnitude of the second voltage is greater than the first maximum threshold voltage; and

wherein the magnitude of the second voltage is less than the second maximum threshold voltage.

14. The apparatus as in claim 13, wherein the semiconductor components in the first set are electrically isolated from the second voltage to prevent damage to the semiconductor components in the first set;

wherein the first voltage is used to perform memory storage operations with respect to storage cells in the first die; and

wherein the second voltage is used to perform memory storage operations with respect to storage cells in the second die.

15. The apparatus as in claim 1 further comprising:

a first conductive link extending from the first die to the second die, the first conductive link conveying the second voltage from the first die to a switch component disposed in the second die; and

a second conductive link extending from the first die to the second die, the second conductive link conveying a switch control signal produced by the switch control circuitry to the switch component, the switch control signal controlling a state of the switch component.

16. The apparatus as in claim 1 further comprising:

a monitor circuit, the monitor circuit monitoring a magnitude of the first voltage as feedback; and

the switch control circuitry controlling switching of the current through the first inductive element to produce the first voltage within a desired voltage range.

17. The apparatus as in claim 1 further comprising:

a monitor circuit, the monitor circuit monitoring a magnitude of the second voltage as feedback; and

the switch control circuitry controlling switching of the current through the second inductive element to produce the second voltage within a desired voltage range.

18. The apparatus as in claim 1 further comprising:

a switch controlled by the switching circuitry, the switch disposed between the first inductive element and the second inductive element, the switch providing the first voltage to power the first die, the second inductive element receiving the first voltage and producing the second voltage powering the second die.

19. A computer system including the apparatus in claim 1, the computer system further comprising:

host computer processor hardware configured to manage settings of corresponding data stored in storage cells of the first die and storage cells in the second die.

20. The computer system as in claim 19 further comprising:

a display screen on which to render an image based at least in part on the corresponding data stored in the apparatus.

21. A method, comprising:

receiving an input voltage;

controlling current through a first inductive element via switching circuitry disposed on a first die of an assembly to produce a first voltage from the input voltage;

deriving a second voltage via current supplied from the first voltage through a second inductive element; and

conveying the second voltage to a second die in the assembly, the second voltage powering circuitry in the second die.

22. The method as in claim 21 further comprising:

producing the second voltage to be greater than a magnitude of the first voltage, the first voltage powering circuitry on the first die.

23. The method as in claim 21, wherein the first inductive element and the second inductive element are disposed in the first die.

24. The method as in claim 21 further comprising:

monitoring a magnitude of the first voltage as feedback; and

controlling switching of the current through the first inductive element to produce the first voltage within a desired voltage range.

25. The apparatus as in claim 21, wherein the first die and the second die are disposed in a vertical memory stack in which a planar facing of the first die is substantially in contact with a planar facing of the second die, the method further comprising:

conveying the second voltage from the second inductive element over a conductive link to a diode disposed in the second die.