SENSOR AND METHOD FOR FABRICATING THE SAME

• US 20150008435A1
• Filed: 11/23/2012
• Published: 01/08/2015
• Est. Priority Date: 07/26/2012
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.)
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.)
• Inventors: Xu, Shaoying, Xie, Zhenyu, Chen, Xu
• Granted Patent: US 9,318,629 B2
• Time in Patent Office: Days
• US Class Current: 257/66
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 27/1461 characterised by the photosensitive area
• CPC Class Codes: H01L 27/14692 Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 31/02325 the optical elements not being integrated nor being directly associated with the device
• CPC Class Codes: H01L 31/0352 characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

Embodiments of the invention disclose a sensor and its fabrication method, the sensor comprises: a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element comprising a TFT device and a photodiode sensing device, wherein the TFT device is a bottom gate TFT; the photodiode sensing device comprises: a receiving electrode connected with a source electrode, a photodiode disposed on the receiving electrode, a transparent electrode disposed on the photodiode, and a bias line disposed on and connected with the transparent electrode, the bias line is disposed as parallel to the gate line.

Claims

1. A sensor, comprising:

a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element comprising a TFT device and a photodiode sensing device, wherein;

the TFT device comprises;

a gate electrode disposed on the base substrate and connected with a neighboring gate line;

a gate insulating layer disposed on the gate electrode and overlaying the base substrate;

an active layer disposed on the gate insulating layer and over the gate electrode;

the ohmic layer disposed on the active layer;

a source electrode and a drain electrode disposed on the ohmic layer and arranged opposed to each other to form a channel, wherein the drain electrode is connected with a neighboring data line; and

a passivation protective layer disposed on the source electrode, the drain electrode and the channel;

the photodiode sensing device comprises;

a receiving electrode connected with the source electrode;

a photodiode disposed on the receiving electrode;

a transparent electrode disposed on the photodiode; and

a bias line disposed over the transparent electrode and connected with the transparent electrode, the bias line is disposed as parallel to the gate line.

2. The sensor of claim 1, further comprising:

the active material layer and the ohmic material layer, both of which are sequentially disposed on the gate insulating layer and under every data line as well as the receiving electrode of every photodiode sensing device, the active material layer and the active layer are of the same material, and the ohmic material layer and the ohmic layer are of the same material.

3. The sensor of claim 1, further comprising:

the first passivation layer disposed on the passivation protective layer and the transparent electrode and overlaying the base substrate, the first passivation layer has a via hole over the transparent electrode for connecting the transparent electrode and the bias line;

a light-shield strip disposed on the first passivation layer and over the source electrode, the drain electrode and the channel;

the second passivation layer disposed on the light-shield strip and overlaying the base substrate, the second passivation layer has a signal-transmitting region via hole.

4. The sensor of claim 1, wherein the data line, the source electrode, the drain electrode and the receive electrode are of the same material.

5. The sensor of claim 1, wherein the light-shield strip and the bias line are of the same material.

6. The sensor of claim 1, wherein the photodiode is a PIN photodiode comprising:

an N-type semiconductor disposed on the receiving electrode, an I-type semiconductor disposed on the N-type semiconductor, and a P-type semiconductor disposed on the I-type semiconductor.

15. The sensor of claim 2, further comprising:

the first passivation layer disposed on the passivation protective layer and the transparent electrode and overlaying the base substrate, the first passivation layer has a via hole over the transparent electrode for connecting the transparent electrode and the bias line;

a light-shield strip disposed on the first passivation layer and over the source electrode, the drain electrode and the channel;

the second passivation layer disposed on the light-shield strip and overlaying the base substrate, the second passivation layer has a signal-transmitting region via hole.

7. A method for fabricating a sensor comprising:

forming a pattern of a gate line and a pattern of a gate electrode connected with the gate line on a base substrate by using a first patterning process;

forming a gate insulating layer overlaying the base substrate, and forming a pattern of an active layer on the gate insulating layer and over the gate electrode, a pattern of an ohmic layer on the active layer, a pattern of a source electrode and a drain electrode on the ohmic layer and arranged opposed to each other to form a channel, a pattern of a data line connected with the drain electrode, and a pattern of a receive electrode connected with the source electrode;

forming a pattern of a passivation protective layer on the source electrode, the drain electrode and the channel by using a second patterning process;

forming a pattern of a photodiode on the receiving electrode and a pattern of a transparent electrode on the photodiode by using a third patterning process;

forming a pattern of a first passivation layer by using a fourth patterning process, the first passivation layer has a via hole over the transparent electrode;

forming a pattern of a bias line on the first passivation layer and connected with the transparent electrode through the via hole over the transparent electrode, and a pattern of a light-shield strip on the source electrode, the drain electrode and the channel by using a fifth patterning process.

8. The method of claim 7, after forming the pattern of the bias line and the pattern of the light-shield strip, the method further comprises:

forming a pattern of a second passivation layer overlaying the base substrate by using a sixth patterning process, the second passivation layer has a signal-transmitting region via hole.

9. The method of claim 7, wherein the photodiode is a PIN photodiode comprising an N-type semiconductor, an I-type semiconductor and a P-type semiconductor.

10. The method of claim 7, wherein forming the pattern of the active layer, the pattern of the ohmic layer, the pattern of the source electrode and the drain electrode, the pattern of the data line and the pattern of the receiving electrode by using a single patterning process, which comprises:

sequentially depositing an active semiconductor layer, an ohmic semiconductor layer and a data line metal layer, and applying a photoresist to the data line metal layer;

exposing the base substrate by using a mask having a light-transmitting portion, a partial-light-transmitting portion and a light-blocking portion;

developing and removing the photoresist corresponding to the light-transmitting portion;

etching the base substrate to form the pattern of the receive electrode, the pattern of the data line and the pattern of the active layer;

ashing the base substrate and removing the photoresist corresponding to the partial-light-transmitting portion;

etching the base substrate and removing the photoresist to form the pattern of the ohmic layer and the pattern of the source electrode and the drain electrode, the source electrode and the drain electrode are arranged opposed to each other to form the channel.

11. The method of claim 10, wherein the light-blocking portion of the mask correspondingly forms a region having the receive electrode, the data line, the source electrode and the drain electrode, and the partial-light-transmitting portion of the mask correspondingly forms a region having the channel.

12. The method of claim 7, wherein forming the pattern of the active layer, the pattern of the ohmic layer, the pattern of the source electrode and the drain electrode, the pattern of the data line and the pattern of the receiving electrode by using two patterning processes, which comprises:

forming the pattern of the active layer over the gate electrode and the pattern of the ohmic layer on the active layer by using a patterning process;

forming the pattern of the source electrode and the drain electrode on the ohmic layer and arranged opposed to each other to form a channel, the pattern of the data line connected with the drain electrode and the pattern of the receive electrode connected with the source electrode by using a patterning process.

13. The method of claim 7, wherein the data line, the source electrode, the drain electrode and the receive electrode are of the same material.

14. The method of claim 7, wherein the light-shield strip and the bias line are of the same material.