MAGNETIC MEMORY DEVICE

• US 20150008548A1
• Filed: 09/06/2013
• Published: 01/08/2015
• Est. Priority Date: 07/03/2013
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: NOMA, Kenji
• Application Number:
  US14/020,562
• Publication Number:
  US 20150008548A1
• Time in Patent Office: Days
• US Class Current: 257/421
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/80 Constructional details

Abstract

According to one embodiment, a magnetic memory device includes a semiconductor substrate, a magnetoresistive element provided on the semiconductor substrate and includes a storage layer, a tunnel barrier layer, and a reference layer which are stacked, the reference layer having a magnetization direction perpendicular to a principal surface of the semiconductor substrate, and a magnetic field generation section provided away from the magnetoresistive element and configured to generate a magnetic field perpendicular to the principal surface of the semiconductor substrate to reduce a magnetic field from the reference layer which is applied to the storage layer.

Claims

1. A magnetic memory device comprising:

a semiconductor substrate;

a magnetoresistive element provided on the semiconductor substrate and comprising a storage layer, a tunnel barrier layer, and a reference layer which are stacked, the reference layer having a magnetization direction perpendicular to a principal surface of the semiconductor substrate; and

a magnetic field generation section provided away from the magnetoresistive element and configured to generate a magnetic field perpendicular to the principal surface of the semiconductor substrate to reduce a magnetic field from the reference layer which is applied to the storage layer.

2. The device of claim 1, wherein the storage layer is provided between the magnetic field generation section and the reference layer, and the tunnel barrier layer is provided between the storage layer and the reference layer.

3. The device of claim 1, wherein the magnetoresistive element comprises a shift cancelling layer further stacked to the storage layer, the tunnel barrier layer and the reference layer.

4. The device of claim 1, wherein the magnetic field generation section includes a permanent magnet with a magnetization direction perpendicular to the principal surface of the semiconductor substrate.

5. The device of claim 1, wherein the magnetic field generation section includes an electromagnet.

6. The device of claim 1, further comprising a switching element provided in a surface area of the semiconductor substrate and electrically connected to the magnetoresistive element.

7. The device of claim 1, wherein the magnetic field generation section is included in a member which assembles a die including the semiconductor substrate and the magnetoresistive element.

8. The device of claim 1, further comprising at least one interconnection layer provided on the semiconductor substrate,

wherein the magnetic field generation section is provided on the at least one interconnection layer.

9. The device of claim 1, wherein the magnetic field generation section is provided in the semiconductor substrate and parallel to the principal surface of the semiconductor substrate.

10. The device of claim 1, wherein the magnetic field generation section is formed of a magnetic material containing, as a main component, at least one selected from a Co—

Cr alloy, an Sm—

Co alloy, a Co—

Pt alloy, an Fe—

Pt alloy, an Nd—

Fe alloy, an Mn—

Al alloy, an Al—

Ni—

Co alloy, a Ba ferrite oxide, and a Co ferrite oxide.

11. A magnetic memory device comprising:

a semiconductor substrate;

a magnetoresistive element provided on the semiconductor substrate and comprising a storage layer, a tunnel barrier layer, and a reference layer which are stacked, the reference layer having a magnetization direction perpendicular to a principal surface of the semiconductor substrate; and

a magnetic field generation section provided away from the magnetoresistive element and formed of a magnetic material containing, as a main component, at least one selected from a Co—

Cr alloy, an Sm—

Co alloy, a Co—

Pt alloy, an Fe—

Pt alloy, an Nd—

Fe alloy, an Mn—

Al alloy, an Al—

Ni—

Co alloy, a Ba ferrite oxide, and a Co ferrite oxide.

12. The device of claim 11, wherein the storage layer is provided between the magnetic field generation section and the reference layer, and the tunnel barrier layer is provided between the storage layer and the reference layer.

13. The device of claim 11, wherein the magnetoresistive element comprises a shift cancelling layer further stacked to the storage layer, the tunnel barrier layer and the reference layer.

14. The device of claim 11, wherein the magnetic field generation section includes a permanent magnet with a magnetization direction perpendicular to the principal surface of the semiconductor substrate.

15. The device of claim 11, further comprising a switching element provided in a surface area of the semiconductor substrate and electrically connected to the magnetoresistive element.

16. The device of claim 11, wherein the magnetic field generation section is included in a member which assembles a die including the semiconductor substrate and the magnetoresistive element.

17. The device of claim 11, further comprising at least one interconnection layer provided on the semiconductor substrate,

wherein the magnetic field generation section is provided on the at least one interconnection layer.

18. The device of claim 11, wherein the magnetic field generation section is provided in the semiconductor substrate and parallel to the principal surface of the semiconductor substrate.