ORGANIC LIGHT EMITTING DIODE DISPLAY

• US 20150014641A1
• Filed: 12/16/2013
• Published: 01/15/2015
• Est. Priority Date: 07/12/2013
• Status: Abandoned Application

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: JUNG, Jin-Goo, Yl, Chung
• Application Number:
  US14/107,578
• Publication Number:
  US 20150014641A1
• Time in Patent Office: Days
• US Class Current: 257/40
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors

Abstract

An organic light emitting diode (OLED) display according to the present invention includes a substrate; a driving gate electrode formed on the substrate; and a first gate insulating layer covering the substrate and the driving gate electrode. A semiconductor layer formed on the first gate insulating layer and including a switching semiconductor layer and a driving semiconductor layer separated from each other. A second gate insulating layer disposed covering the semiconductor layer. A switching gate electrode formed on the second gate insulating layer and overlapping the switching semiconductor layer. An interlayer insulating layer is disposed covering the switching gate electrode and the second gate insulating layer, wherein a thickness of the first gate insulating layer is thicker a thickness of the second gate insulating layer.

Claims

1. An organic light emitting diode (OLED) display comprising:

a substrate;

a driving gate electrode disposed on the substrate;

a first gate insulating layer covering the substrate and the driving gate electrode;

a semiconductor layer disposed on the first gate insulating layer and comprising a switching semiconductor layer and a driving semiconductor layer spaced apart from each other;

a second gate insulating layer covering the semiconductor layer;

a switching gate electrode formed on the second gate insulating layer and overlapping the switching semiconductor layer; and

an interlayer insulating layer covering the switching gate electrode and the second gate insulating layer,

wherein a thickness of the first gate insulating layer is greater than a thickness of the second gate insulating layer.

2. The organic light emitting diode (OLED) display of claim 1, further comprising:

a scan line disposed on the substrate and configured to transmit a scan signal;

a data line and a driving voltage line intersecting the scan line and configured to respectively transmit a data signal and a driving voltage;

a switching transistor connected to the scan line and the data line and comprising the switching semiconductor layer and the switching gate electrode;

a driving transistor connected to a switching drain electrode of the switching transistor and comprising the driving semiconductor layer and the driving gate electrode;

a compensation transistor configured to compensate a threshold voltage of the driving transistor in response to the scan signal, the compensation transistor connected to the driving transistor; and

an organic light emitting diode (OLED) connected to a driving drain electrode of the driving transistor.

3. The organic light emitting diode (OLED) display of claim 2, wherein

the scan line is formed with the same layer as the switching gate electrode.

4. The organic light emitting diode (OLED) display of claim 2, wherein

the scan line is formed with the same layer as the driving gate electrode.

5. The organic light emitting diode (OLED) display of claim 4, wherein

the compensation gate electrode of the compensation transistor is formed with the same layer as the driving gate electrode.

6. The organic light emitting diode (OLED) display of claim 5, further comprising:

a first storage capacitive plate disposed on the first gate insulating layer; and

a storage capacitor comprising a second storage capacitive plate and formed on the second gate insulating layer covering the first storage capacitive plate and overlapping the first storage capacitive plate.

7. The organic light emitting diode (OLED) display of claim 6, further comprising:

a third gate insulating layer disposed between the second gate insulating layer and the interlayer insulating layer,

wherein the second gate insulating layer and the third gate insulating layer are disposed between the switching semiconductor layer and the switching gate electrode of the switching transistor.

8. The organic light emitting diode (OLED) display of claim 7, wherein

the second gate insulating layer and the third gate insulating layer are disposed between the compensation semiconductor layer and the compensation gate electrode of the compensation transistor.

9. The organic light emitting diode (OLED) display of claim 8, further comprising:

a first storage capacitive plate formed on the second gate insulating layer; and

a storage capacitor comprising the second storage capacitive plate and formed on the third gate insulating layer covering the first storage capacitive plate and overlapping the first storage capacitive plate.

10. The organic light emitting diode (OLED) display of claim 9, wherein

the storage capacitor overlaps the driving transistor.

11. A display comprising:

a driving gate electrode disposed on a substrate;

a first gate insulating layer disposed on the driving gate electrode;

a driving semiconductor layer, a switching semiconductor layer, and a light emission control semiconductor layer disposed on the first gate insulating layer, the driving gate electrode formed under the driving semiconductor layer, wherein

a thickness of the first gate insulating layer is greater than a thickness of the second gate insulating layer, and wherein

an interval between the driving semiconductor layer and the driving gate electrode is widened.

12. A method comprising:

forming a driving gate on a substrate;

forming a first gate insulator covering the substrate and the driving gate electrode;

forming a semiconductor layer on the first gate insulating layer, the semiconductor layer comprising a switching semiconductor layer and a driving semiconductor layer spaced apart from each other, and a second gate insulating layer covering the semiconductor layer;

forming a switching gate electrode on the second gate insulating layer, the switching gate electrode overlapping the switching semiconductor layer; and

forming an interlayer insulating layer covering the switching gate electrode and the second gate insulating layer, wherein the first gate insulating layer is formed thicker than the second gate insulating layer.