SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
First Claim
Patent Images
1. A semiconductor device comprising:
- a substrate including a first active region, a second active region and a field region between and directly contacting the first and second active regions; and
a gate structure formed on the substrate to cross the first active region, the second active region and the field region,wherein the gate structure includes a p-type metal gate electrode and an n-type metal gate electrode directly contacting each other,wherein the p-type metal gate electrode is formed on the first active region and the n-type metal gate electrode is formed on the second active region, andwherein the contact surface between the p-type metal gate electrode and the n-type metal gate electrode is closer to the first active region than to the second active region.
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Abstract
A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
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Citations
30 Claims
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1. A semiconductor device comprising:
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a substrate including a first active region, a second active region and a field region between and directly contacting the first and second active regions; and a gate structure formed on the substrate to cross the first active region, the second active region and the field region, wherein the gate structure includes a p-type metal gate electrode and an n-type metal gate electrode directly contacting each other, wherein the p-type metal gate electrode is formed on the first active region and the n-type metal gate electrode is formed on the second active region, and wherein the contact surface between the p-type metal gate electrode and the n-type metal gate electrode is closer to the first active region than to the second active region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor device comprising:
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a substrate including a first active region, a second active region and a field region between and directly contacting the first and second active regions; an interlayer dielectric layer formed on the substrate, including a trench intersecting the first active region, the field region and the second active region; and a gate structure formed in the trench to intersect the first active region, the second active region and the field region and having a top surface coplanarly formed with the interlayer dielectric layer, wherein the gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, and a contact surface formed between the p-type metal gate electrode and the n-type metal gate electrode, wherein the p-type metal gate electrode is formed on the first active region and the n-type metal gate electrode is formed on the second active region, and wherein a first width ranging from the contact surface to the first active region is less than a second width ranging from the contact surface to the second active region. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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19. A semiconductor device comprising:
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a first fin type active pattern; a second fin type active pattern adjacent to the first fin type active pattern; an isolation layer formed between and making direct contact with the first fin type active pattern and the second fin type active pattern; and a gate structure intersecting the first fin type active pattern, the isolation layer and the second fin type active pattern, wherein the gate structure includes a p-type metal gate electrode and an n-type metal gate electrode directly contacting each other, wherein the p-type metal gate electrode is formed on the first fin type active pattern, and the n-type metal gate electrode is formed on the second fin type active pattern, and wherein a contact surface between the p-type metal gate electrode and the n-type metal gate electrode is closer to the first fin type active pattern than to the second fin type active pattern. - View Dependent Claims (20, 21, 22, 23, 24, 25)
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26. A semiconductor device, comprising:
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a gate structure formed over sequentially arranged first active, field, and second active regions in a substrate; and a p-type metal gate electrode in the gate structure extending from over the first active region less than half way toward the second active region. - View Dependent Claims (27)
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28. A semiconductor device, comprising:
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a gate structure formed over sequentially arranged first active, field, and second active regions in a substrate; a p-type metal gate electrode in the gate structure extending from over the first active region; and an n-type metal gate electrode in the gate structure extending from over the second active region, the n-type and p-type metal gate electrodes arranged to increase the threshold voltage of the semiconductor device. - View Dependent Claims (29, 30)
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Specification