CIRCUIT AND METHOD FOR DRIVING LED LAMP WITH A DIMMER

• US 20150015153A1
• Filed: 09/26/2014
• Published: 01/15/2015
• Est. Priority Date: 09/02/2010
• Status: Active Grant

• Current Assignee: BCD Shanghai Micro-Electronics Company Limited
• Original Assignee: BCD Semiconductor Manufacturing Limited (Diodes Incorporated)
• Inventors: DUAN, JIANHUA, REN, XUEGANG, LIU, NA
• Granted Patent: US 10,462,868 B2
• Time in Patent Office: Days
• US Class Current: 315/200.R
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/382 with galvanic isolation between input and output
• CPC Class Codes: H05B 45/385 using flyback topology
• CPC Class Codes: H05B 45/397 Current mirror circuits
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A driver circuit for an LED (light-emitting diode) lamp includes a transformer having a primary winding and a secondary winding, a dimmer circuit coupled to a power source for varying an input voltage to the primary winding, and an output rectifying circuit coupled to the secondary winding for providing an output current to the LED lamp. The driver circuit also includes a controller coupled to the dimmer circuit to receive an average input voltage signal (DIM) from the dimmer circuit. The controller is configured to vary the output current according to the average input voltage.

Claims

1. A driver circuit for an LED (light-emitting diode) lamp, comprising:

a transformer having a primary winding and a secondary winding;

a dimmer circuit coupled to a power source for varying an input voltage to the primary winding;

an output rectifying circuit coupled to the secondary winding for providing an output current to the LED lamp;

a controller coupled to the dimmer circuit to receive an average input voltage signal (DIM) from the dimmer circuit, the controller being configured to vary the output current according to the average input voltage.

2. The driver circuit of claim 1 wherein the controller is configured to generate a control signal characterized by a duty cycle that is determined by a ratio of a charging current to a discharging current coupled to a capacitor, the ratio being related to the average input voltage signal from the dimmer circuit.

3. The driver circuit of claim 1 wherein the control circuit is configured to provide a pulsed control signal based, at least in part, on the input voltage.

4. The driver circuit of claim 1 wherein the control circuit is configured to turn on the pulsed control signal based on the feedback signal and the input signal.

5. The driver circuit of claim 1 wherein the control circuit is configured to turn off the pulsed control signal based on the current sense signal and the input signal.

6. The driver circuit of claim 1 wherein the control circuit is configured to turn on the pulsed control signal based on the feedback signal and the input signal, and the control circuit is configured to turn off the pulsed control signal based on the current sense signal and the input signal.

7. The driver circuit of claim 1 wherein the controller is configured to provide an output current Io characterized by the following equations:

8. The driver circuit of claim 1 wherein the controller includes a current control module, the current control module comprising:

a voltage follower for receiving the DIM signal;

a substractor coupled to the voltage follower;

a first current mirror coupled to the substractor,

a current selector configured to receive a current from the first current mirror;

a second current mirror configured to receive a first reference voltage and to provide three reference currents, two of the reference currents being coupled to the current selector, wherein the current selector are configured to provide two output signals, a first output signal coupled to a peak current comparator, a second output signal coupled to a constant-current control circuit for adjusting a ratio of charging and discharging.

9. The driver circuit of claim 8 wherein the substractor comprises:

a first resistor,

a second resistor,

a third resistor, and

an operational amplifier, the substractor configured to produce a Vdim_in signal cauterized by;

10. The driver circuit of claim 8 wherein the maximum current selector comprises three current mirrors and is configured received three input currents I1, I2, and I3, with I2=I3, wherein:

If I1>

I2, then the output current=I2, and

If I1<

I2, then the output current=I1.

11. The driver circuit of claim 8 wherein, when the DIM signal is greater than a reference signal, the output current of the maximum current selector is set to zero.

12. A control circuit for controlling a power switch in a switched mode power supply (SMPS), the control circuit comprising:

a first input terminal for receiving an input signal representing an input voltage to the SMPS;

a second input terminal for receiving a feedback signal representing an output of the SMPS;

a third input terminal for receiving a current sense signal representing a current flow in the power switch;

an output terminal for providing a pulsed control signal to the power switch;

wherein the control circuit is configured to provide the pulsed control signal based, at least in part, on the input voltage.

13. The control circuit of claim 12 wherein the control circuit is configured to turn on the pulsed control signal based on the feedback signal and the input signal.

14. The control circuit of claim 12 wherein the control circuit is configured to turn off the pulsed control signal based on the current sense signal and the input signal.

15. The control circuit of claim 12 wherein the pulsed control signal is characterized by a duty cycle that is related to the input signal.

16. The control circuit of claim 12 wherein the pulsed control signal is characterized by a duty cycle that is determined by a charging current and a discharging current coupled to a capacitor, the charging current and the discharging current being related to the input signal.

17. The control circuit of claim 12 wherein, when the input signal becomes lower, the control circuit is configured to reduce a duty cycle of the pulsed control signal and to lower a peak current through the power switch with a lower input signal.

18. The control circuit of claim 12 wherein the control circuit is configured to receive the input signal from a dimmer circuit that varies the input voltage to the SMPS.

19. A control circuit for controlling a power switch in a switched mode power supply (SMPS), the control circuit comprising:

a first input terminal for receiving an input signal representing an input voltage to the SMPS;

a second input terminal for receiving a feedback signal representing an output of the SMPS;

a third input terminal for receiving a current sense signal representing a current flow in the power switch;

an output terminal for providing a pulsed control signal to the power switch;

wherein the control circuit is configured to turn on the pulsed control signal based on the feedback signal and the input voltage;

wherein the control circuit is configured to turn off the pulsed control signal based on the current sense signal and the input voltage.

20. The control circuit of claim 19 wherein the pulsed control signal is characterized by a duty cycle that is determined by a charging current and a discharging current coupled to a capacitor, the charging current and the discharging current being related to the input signal.