Bonded Semiconductor Structures

• US 20150021741A1
• Filed: 07/18/2013
• Published: 01/22/2015
• Est. Priority Date: 07/18/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lin, Jing-Cheng
• Granted Patent: US 9,859,112 B2
• Time in Patent Office: Days
• US Class Current: 257/618
• CPC Class Codes: H01L 21/02104 Forming layers deposition in general C23C; crystal growth in general C30B
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A method is disclosed that includes the steps outlined below. An epitaxial layer is formed on a first semiconductor substrate. At least one implant species is implanted between the epitaxial layer and the first semiconductor substrate to form an ion-implanted layer. The epitaxial layer is bonded to a bonding oxide layer of a second semiconductor substrate. The first semiconductor substrate is separated from the ion-implanted layer.

Claims

1. A method, comprising:

forming an epitaxial layer on a first semiconductor substrate;

implanting at least one implant species between the epitaxial layer and the first semiconductor substrate to form an ion-implanted layer;

bonding the epitaxial layer to a bonding oxide layer of a second semiconductor substrate; and

separating the first semiconductor substrate from the ion-implanted layer.

2. The method of claim 1, further comprising:

forming a first semiconductor device portion on the epitaxial layer.

3. The method of claim 1, further comprising:

polishing the epitaxial layer after separating the first semiconductor substrate from the ion-implanted layer.

4. The method of claim 1, wherein a thickness of the epitaxial layer is 1-10 micrometers.

5. The method of claim 1, wherein the second semiconductor substrate comprises a second semiconductor device portion.

6. The method of claim 1, wherein the second semiconductor device portion is capped by the bonding oxide layer.

7. The method of claim 4, further comprising:

forming at least one via through the first semiconductor device portion, the epitaxial layer, and the bonding oxide layer, for connecting the first semiconductor device portion and the second semiconductor device portion.

8. The method of claim 7, further comprising:

forming an interconnect layer on the first semiconductor device portion.

9. The method of claim 5, wherein a diameter of the at least one via is less than 4 micrometers.

10. The method of claim 1, further comprising:

forming a first oxide layer on the epitaxial layer;

wherein the epitaxial layer is bonded to the bonding oxide layer of the second semiconductor substrate through the first oxide layer.

11. The method of claim 1, wherein the at least one implant species comprises at least one of He and H.

12. The method of claim 1, wherein the epitaxial layer comprises at least one of Ge, InP and GaAs.

17. The method of claim 1, further comprising:

forming a first oxide layer on the epitaxial layer;

wherein the epitaxial layer is bonded to the bonding oxide layer of the second semiconductor substrate through the first oxide layer.

27. The method of claim 3, wherein the epitaxial layer is polished by a chemical mechanical polishing (CMP) process.

13. A method, comprising:

bonding an epitaxial layer on a first semiconductor substrate to a bonding oxide layer of a second semiconductor substrate, wherein the epitaxial layer and the first semiconductor substrate comprises an ion-implanted layer in between;

separating the first semiconductor substrate from the ion-implanted layer;

forming a first semiconductor device portion on the epitaxial layer;

forming at least one via through the first semiconductor device portion, the epitaxial layer, and the bonding oxide layer; and

forming an interconnect layer on the first semiconductor device portion.

14. The method of claim 13, further comprising:

polishing the epitaxial layer after separating the first semiconductor substrate from the ion-implanted layer.

15. The method of claim 13, wherein a thickness of the epitaxial layer is 1-10 micrometers.

16. The method of claim 13, wherein a diameter of the at least one via is less than 4 micrometers.

28. The method of claim 13, wherein the ion-implanted layer comprises at least one implant species that comprises at least one of He and H.

29. The method of claim 13, wherein the epitaxial layer comprises at least one of Ge, InP and GaAs.

18-26. -26. (canceled)