ADAPTIVE LDO REGULATOR SYSTEM AND METHOD

• US 20150022177A1
• Filed: 07/22/2013
• Published: 01/22/2015
• Est. Priority Date: 07/22/2013
• Status: Active Grant

• Current Assignee: MaxLinear Communications, LLC (f/k/a Entropic Communications, LLC) (Maxlinear Incorporated)
• Original Assignee: Entropic Communications Incorporated (Maxlinear Incorporated)
• Inventors: Petrovic, Branislav, Nabicht, Joseph
• Granted Patent: US 9,201,436 B2
• Time in Patent Office: Days
• US Class Current: 323/303
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: G05F 5/00 Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output

Abstract

An adaptive low dropout voltage regulator (LDO) circuit having low power dissipation, and a method of regulating voltage while maintaining low power dissipation. Power dissipation in an LDO circuit is controlled and held to a low value using an LDO circuit that maintains a constant voltage difference between Vin and Vout; that is, ΔV=Vin−Vout is approximately constant rather than linearly variable as a function of Vin. The output voltage Vout essentially tracks the input voltage Vin with an offset equal to ΔV; Vout increases as Vin, but is kept between minimum and maximum voltage output specification limits.

Claims

1. An adaptive low dropout voltage regulator circuit having low power dissipation, including:

(a) a pass transistor having a control gate, a voltage input, and a voltage output; and

(b) an adaptive control circuit, electrically coupled to the control gate of the pass transistor, the voltage input, and the voltage output, for determining a difference Δ

V between the voltage input to the pass transistor and the voltage output of the pass transistor, and causing an error signal to be applied to the control gate of the pass transistor to keep Δ

V essentially constant as the voltage input varies.

2. The adaptive low dropout voltage regulator circuit of claim 1, wherein the adaptive control circuit includes a voltage summing circuit, electrically coupled to a reference voltage and one of the input voltage or the output voltage, for generating a comparison value, and the adaptive low dropout voltage regulator circuit further including an error amplifier, electrically coupled to the control gate of the pass transistor and to the adaptive control circuit, for generating the error signal from the comparison value and the other one of the input voltage or the output voltage.

3. The adaptive low dropout voltage regulator circuit of claim 1, wherein the adaptive control circuit includes:

(a) at least one analog to digital converter for digitizing the value of the voltage input and the voltage output;

(b) a signal processor, coupled to the at least one analog to digital converter, for computing Δ

V; and

(c) a digital to analog converter, coupled to the signal processor, for converting Δ

V to the error signal.

4. An adaptive low dropout voltage regulator circuit having low power dissipation, including:

(a) means for determining a difference Δ

V between a voltage input to a pass transistor and a voltage output of the pass transistor; and

(b) means for controlling the power dissipation of the pass transistor as a function of Δ

V so as to maintain such power dissipation approximately constant as the voltage input varies.

5. The adaptive low dropout voltage regulator circuit of claim 4, wherein the means for controlling the power dissipation of the pass transistor as a function of Δ

V comprises means for maintaining Δ

V approximately constant as the voltage input varies.

6. The adaptive low dropout voltage regulator circuit of claim 4 wherein the means for controlling the power dissipation of the pass transistor comprises means for providing adaptive control circuitry, electrically coupled to the control gate of the pass transistor, the voltage input, and the voltage output, for determining the difference Δ

V between the voltage input to the pass transistor and the voltage output of the pass transistor and means for applying an error signal derived from the adaptive control circuitry to the control gate of the pass transistor to keep Δ

V essentially constant as the voltage input varies.

7. A method of regulating voltage with an adaptive low dropout voltage regulator circuit having a pass transistor while maintaining low power dissipation in the pass transistor, including:

(a) determining a difference Δ

V between a voltage input to the pass transistor and a voltage output of the pass transistor; and

(b) controlling the power dissipation of the pass transistor as a function of Δ

V so as to maintain such power dissipation approximately constant as the voltage input varies.

8. The method of claim 7, further including filtering the voltage input before determining Δ

V in order to track only moving average changes to the voltage input.

9. The method of claim 7 wherein controlling the power dissipation of the pass transistor as a function of Δ

V comprises maintaining Δ

V approximately constant as the voltage input varies.

10. The method of claim 9, further including filtering the voltage input before determining Δ

V in order to track only moving average changes to the voltage input.

11. A method of regulating voltage in an adaptive low dropout voltage regulator circuit while maintaining low power dissipation, including:

(a) providing a pass transistor having a control gate, a voltage input, and a voltage output;

(b) providing adaptive control circuitry, electrically coupled to the control gate of the pass transistor, the voltage input, and the voltage output, for determining a difference Δ

V between the voltage input to the pass transistor and the voltage output of the pass transistor; and

(c) applying an error signal derived from the adaptive control circuitry to the control gate of the pass transistor to keep Δ

V essentially constant as the voltage input varies.

12. The method of claim 11, further including filtering the voltage input before determining Δ

V in order to track only moving average changes to the voltage input.