CONFIGURABLE LOGIC CONSTRUCTS IN A LOOP BUFFER
First Claim
1. A method for executing a loop on a computing system, the method comprising:
- programming a configurable hardware block based on one or more target functions within the loop;
wherein the configurable hardware block is associated with a plurality of registers;
wherein the plurality of registers includes a loopcount register, an input register and an output register;
for each iteration of the loop,(a) updating, in the loopcount register, a counter value that tracks a number of iterations in the loop; and
(b) updating, in the output register based at least in part on a value in the input register, a target value using the programmed configurable hardware block.
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Accused Products
Abstract
Techniques are described herein for using configurable logic constructs in a loop buffer. In an embodiment, a configurable hardware block is programmed based on one or more target functions within a loop. The configurable hardware block is associated with a plurality of registers, including a loopcount register and a first output register. For each iteration of the loop, a counter value in the loopcount register is updated and a target value in the first output register is updated using the programmed configurable hardware block. For each iteration of the loop, a set of one or more instructions may be fetched from the instruction buffer and executed based on the updated target value in the first output value.
45 Citations
27 Claims
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1. A method for executing a loop on a computing system, the method comprising:
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programming a configurable hardware block based on one or more target functions within the loop; wherein the configurable hardware block is associated with a plurality of registers; wherein the plurality of registers includes a loopcount register, an input register and an output register; for each iteration of the loop, (a) updating, in the loopcount register, a counter value that tracks a number of iterations in the loop; and (b) updating, in the output register based at least in part on a value in the input register, a target value using the programmed configurable hardware block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. One or more non-transitory computer-readable media storing instructions for executing a loop on a computer system, the instructions, in response to being executed by one or more processors, causing the computing system to perform operations comprising:
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programming a configurable hardware block based on one or more target functions within the loop; wherein the configurable hardware block is associated with a plurality of registers; wherein the plurality of registers includes a loopcount register, an input register, and an output register; for each iteration of the loop, (a) updating, in the loopcount register, a counter value that tracks a number of iterations in the loop; and (b) updating, in the output register based at least in part on a value in the input register, a target value using the programmed configurable hardware block. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A system for executing a loop, the system comprising:
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one or more processors; a configurable hardware block that is programmable by the one or more processors; wherein the configurable hardware block is associated with a plurality of registers; wherein the plurality of registers includes a loopcount register, an input register, and an output register; one or more non-transitory computer-readable media storing instructions which, in response to being executed by the one or more processors, cause operations comprising; programming the configurable hardware block based on one or more target functions within the loop; for each iteration of the loop, (a) updating, in the loopcount register, a counter value that tracks a number of iterations in the loop; and (b) updating, in the output register based at least in part on a value in the input register, a target value using the programmed configurable hardware block. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27)
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Specification