CONTROLLER TIMING SYSTEM AND METHOD

• US 20150026504A1
• Filed: 07/16/2013
• Published: 01/22/2015
• Est. Priority Date: 07/16/2013
• Status: Active Grant

• Current Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Original Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Inventors: Hashim, Hasdi R., Franks, Donald Charles
• Granted Patent: US 9,766,648 B2
• Time in Patent Office: Days
• US Class Current: 713/400
• CPC Class Codes: B60W 10/00 Conjoint control of vehicle sub-units of different type or different function for propulsion of purely electrically-propelled vehicles with power supplied within the vehicle B60L50/00 - B60L58/00
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: G06F 1/12 Synchronisation of different clock signals provided by a plurality of clock generators
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A controller timing system according to an exemplary aspect of the present disclosure includes, among other things, a master controller to generate a timing signal, a first slave controller configured to wake in response to the timing signal, and a second slave controller configured to wake in response to the timing signal. Timing of the first slave controller and timing of the second slave controller is coordinated based on the timing signal.

Claims

1. A controller timing system, comprising:

a master controller to generate a timing signal;

a first slave controller configured to wake in response to the timing signal; and

a second slave controller configured to wake in response to the timing signal, wherein timing of the first slave controller and timing of the second slave controller is coordinated based on the timing signal.

2. The system of claim 1, wherein the timing signal is a pulse width modulated signal.

3. The system of claim 1, including a clock of the first slave controller and a clock of the second slave controller, both clocks configured to start at the same time based on the timing signal.

4. The system of claim 1, including a clock of the first slave controller and a clock of the second slave controller, both clocks configured to wake in response to a pulse of the timing signal.

5. The system of claim 4, wherein the pulse is a first pulse, and the clocks of the first and second slave controllers are configured to shut down if a second pulse of the timing signal is not detected within a set time after the first pulse.

6. The system of claim 5, wherein the set time is from 1 to 100 milliseconds.

7. The system of claim 4, wherein the clocks of the first and second slave controllers are configured to wake in response to a rising edge of the pulse.

8. The system of claim 1, wherein the master controller is a powertrain control module of an electric vehicle.

9. The system of claim 8, wherein the master controller is configured to wake in response to an input from a vehicle key, a battery plug-in, or both.

10. A method of controller system timing, comprising:

generating a timing signal at a master controller;

communicating the timing signal to a first slave controller and a second slave controller;

waking the first slave controller and the second slave controller with the timing signal; and

coordinating timing of the first slave controller and the second slave controller based on the timing signal.

11. The method of claim 10, wherein the timing signal is a pulse width modulated signal.

12. The method of claim 10, including using the timing signal to synchronize a clock of the first slave controller with a clock of the second slave controller.

13. The method of claim 10, including waking a clock of the first slave controller and a clock of the second slave controller with a pulse of the timing signal.

14. The method of claim 13, wherein the pulse is a first pulse, and the clocks of the first and second slave controllers are configured to shut down if a second pulse of the timing signal is not detected within a set time after the first pulse.

15. The method of claim 14, wherein the set time is from 1 to 100 milliseconds.

16. The method of claim 15, using a rising edge of the pulse to wake both a clock of the first slave controller and a clock of the second slave controller.

17. The method of claim 10, communicating the timing signal from a master controller to both the first slave controller and the second slave controller.