ORGANIC LIGHT EMITTING DIODE DISPLAY HAVING THIN FILM TRANSISTOR SUBSTRATE USING OXIDE SEMICONDUCTOR AND METHOD FOR MANUFACTURING THE SAME

• US 20150034933A1
• Filed: 07/29/2014
• Published: 02/05/2015
• Est. Priority Date: 07/30/2013
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: NAM, Woojin, HONG, Sungjin, AHN, Byungchul, KOH, Youngju, TANI, Ryosuke
• Granted Patent: US 9,318,616 B2
• Time in Patent Office: Days
• US Class Current: 257/40
• CPC Class Codes: H01L 21/44 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
• CPC Class Codes: H01L 21/47635 After-treatment of these layers
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42356 Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7818 the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/126 Shielding, e.g. light-blocking means over the TFTs

Abstract

Provided is a thin film transistor having an oxide semiconductor material for an organic light emitting diode display and a method for manufacturing the same. The organic light emitting diode display comprises: a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; a semiconductor layer formed on the gate insulating layer to overlap with the gate electrode, and including a channel area and source and drain areas which extend from the channel area to both outsides, respectively and are conductorized; an etch stopper formed on the channel area and exposing the source area and the drain area; a source electrode contacting portions of the exposed source electrode; and a drain electrode contacting portions of the exposed drain electrode.

Claims

1. An organic light emitting diode (OLED) display comprising:

a gate electrode formed on a substrate;

a gate insulating layer formed on the gate electrode;

a semiconductor layer formed on the gate insulating layer to overlap with the gate electrode, and including a channel area and source and drain areas which extend from the channel area to lateral end portions, respectively, and are conductorized;

an etch stopper formed on the channel area and exposing the source area and the drain area;

a source electrode contacting portions of the exposed source area; and

a drain electrode contacting portions of the exposed drain area.

2. The OLED device according to claim 1, wherein the source electrode contacts a surface of the portions of the exposed source area that is apart from the channel area toward one of the lateral end portions with a first predetermined distance, and the other portions of the source area between the source electrode and the channel area are exposed;

and

wherein the drain electrode contacts a surface of the portions of the exposed drain area that is apart from the channel area toward the other lateral end portion with a second predetermined distance, and the other portions of the drain area between the source electrode and the channel area are exposed.

3. The OLED device according to claim 1, wherein the source electrode and the drain electrode each include a first metal layer and a second metal layer stacked on the first metal layer.

4. The OLED device according to claim 1, wherein the etch stopper is disposed on an entire surface of the substrate on the semiconductor layer, and includes a source area hole exposing the source area and a drain area hole exposing the drain area.

5. The OLED device according to claim 1, wherein the etch stopper and the channel area have a size and a shape that are the same as those of the gate electrode.

6. The OLED device according to claim 1, wherein the semiconductor layer includes an oxide semiconductor material and;

wherein the source area and the drain area include a conductorized portion of the oxide semiconductor material.

7. A method for manufacturing an organic light emitting diode (OLED) display, the method comprising:

forming a gate electrode on a substrate;

forming a semiconductor layer by depositing a gate insulating layer and an oxide semiconductor material and patterning the oxide semiconductor material;

forming an etch stopper on a central portion of the semiconductor layer;

conducting a plasma treatment using the etch stopper as a mask to conductorize portions of the semiconductor layer exposed by the etch stopper for defining a channel area, a source area and a drain area; and

forming a source electrode contacting portions of the conductorized source area and a drain electrode contacting portions of the conductorized drain area.

8. The method according to claim 7, wherein the step of forming the etch stopper includes:

depositing an insulating layer on the semiconductor layer; and

forming a source area hole exposing the source area and a drain area hole exposing the drain area by patterning the insulating layer using a mask.

9. The method according to claim 7, wherein the step of forming the etch stopper includes:

depositing an insulating layer on the semiconductor layer; and

patterning the etch stopper with a back exposure method using the gate electrode as a mask so that the source area and the drain area are exposed and the channel area is covered by the etch stopper.

10. The method according to claim 7, wherein, in the forming the source electrode and the drain electrode, the source electrode contacts a surface of the portions of the source area that is apart from the channel area with a first predetermined distance, and the other portions of the source area between the source electrode and the channel area are exposed;

and

the drain electrode contacts a surface of the portions of the drain area that is apart from the channel area with a second predetermined distance, and the other portions of the drain area between the drain electrode and the channel area are exposed.

11. The method according to claim 7, wherein the step of forming the source electrode and the drain electrode includes:

depositing a first metal layer and a second metal layer sequentially on the etch stopper;

patterning the second metal layer with an wet etching method; and

patterning the first metal layer with a dry etching method using the patterned second metal layer as a mask.

12. The method according to claim 7, wherein the step of conducting the plasma treatment includes reducing an oxygen content in the exposed portions of the semiconductor layer.

13. The method according to claim 7, wherein the step of conducting the plasma treatment includes aligning a first end of the etch stopper with a boundary between the channel area and the source area and a second end of the etch stopper with a boundary between the channel area and the drain area.